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onsemi MC14541BDTR2G

Manufacturer
MPN
MC14541BDTR2G
LCSC Part #
C223607
Packaging
TSSOP-14
Customer #
Key Attributes
MC14541B Programmable Timer
Datasheetpdf icononsemi MC14541BDTR2G
RoHS Compliance2 documents available
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1+$ 0.868$ 0.87
10+$ 0.8495$ 8.50
30+$ 0.8356$ 25.07
100+$ 0.8232$ 82.32
Standard Packaging2500/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Programmable Timers and Oscillators
Manufactureronsemi
PackagingTSSOP-14
Supply Current15uA
Quiescent Current0.005uA
FeaturesProgrammable time-base frequency division network;Built-in crystal oscillator
Operating Temperature-55℃~+125℃
Frequency3MHz
Voltage - Supply3V~18V

Introduction

AI Translation

The MC14541B programmable timer consists of a 16−stage binary counter, an integrated oscillator for use with an external capacitor and two resistors, an automatic power−on reset circuit, and output control logic.

Timing is initialized by turning on power, whereupon the power−on reset is enabled and initializes the counter, within the specified VDD range. With the power already on, an external reset pulse can be applied. Upon release of the initial reset command, the oscillator will oscillate with a frequency determined by the external RC network. The 16−stage counter divides the oscillator frequency (fosc) with the nth stage frequency being fosc/2^n.

Features

AI Translation
  • Available Outputs 2^8, 2^10, 2^13 or 2^16
  • Increments on Positive Edge Clock Transitions
  • Built−in Low Power RC Oscillator ±2% accuracy over temperature range and ±20% supply and ±3% over processing at <10 kHz
  • Oscillator May Be Bypassed if External Clock Is Available (Apply external clock to Pin 3)
  • External Master Reset Totally Independent of Automatic Reset Operation Operates as 2^n Frequency Divider or Single Transition Timer
  • Q/Q(overline) Select Provides Output Logic Level Flexibility
  • Reset (auto or master) Disables Oscillator During Resetting to Provide No Active Power Dissipation
  • Clock Conditioning Circuit Permits Operation with Very Slow Clock Rise and Fall Times
  • Automatic Reset Initializes All Counters On Power Up
  • Supply Voltage Range =3.0 Vdc to 18 Vdc with Auto Reset Disabled (Pin 5=VDD) =8.5 Vdc to 18 Vdc with Auto Reset Enabled (Pin 5=VSS)
  • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
  • These Devices are Pb−Free and are RoHS Compliant

Applications

AI Translation
  • Digital timer applications
  • When the Master Reset (MR) receives a positive pulse, the internal counter and latch are reset. The Q output goes high and remains high until the number of clock pulses selected by A and B has been counted, then the Q output goes low and remains low until another input pulse is received.
  • This "one-shot" is fully retriggerable and is as accurate as the input frequency. If higher precision is required, an external clock can be used (pin 3 is the clock input, pins 1 and 2 are outputs).
  • Note that after initial power-up, a setup time equal to the desired pulse width is required, during which the Q output will be high.