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MICROCHIP ATSAMC21J18A-MUT
| Manufacturer | |
| MPN | ATSAMC21J18A-MUT |
| LCSC Part # | C124135 |
| Packaging | QFN-64-EP(9x9) |
| Customer # | |
| Key Attributes | 32-bit Arm Cortex-M0+, supporting 5V power supply, CAN-FD, PTC, and advanced analog |
| Datasheet |  MICROCHIP ATSAMC21J18A-MUT |
| RoHS Compliance | 2 documents available |
| Alternative Parts | 2 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-64-EP(9x9) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 12bit;16bit | |
| Voltage - Supply | 2.7V~5.5V | |
| Program Storage Size | 256KB | |
| CPU Core | ARM Cortex-M Series | |
| CPU Maximum Speed | 48MHz | |
| Number of I/O | 52 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-64-EP(9x9) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 12bit;16bit |
| Type | Description | |
|---|---|---|
| Voltage - Supply | 2.7V~5.5V | |
| Program Storage Size | 256KB | |
| CPU Core | ARM Cortex-M Series | |
| CPU Maximum Speed | 48MHz | |
| Number of I/O | 52 |
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Features
AI Translation
- Operating Conditions: 2.7V – 5.5V, -40°C to +125°C, DC to 48 MHz; -40°C to +85°C, DC to 64 MHz
- Core Arm Cortex-M0+ CPU running at up to 48 MHz or 64 MHz: Single-cycle hardware multiplier, Micro Trace Buffer, Memory Protection Unit (MPU)
- Memories: 32/64/128/256 KB in-system self-programmable Flash, 1/2/4/8 KB independent self-programmable Flash for EEPROM emulation, 4/8/16/32 KB SRAM main memory
- System: Power-on Reset (POR) and Brown-out Detection (BOD), Internal and external clock options with 48 MHz to 96 MHz Fractional Digital Phase Locked Loop (FDPLL96M), External Interrupt Controller (EIC) (Interrupt pin debouncing is only available in SAM C20/C21 N), 16 external interrupts, Hardware debouncing (only available in SAM C20/C21 N), One non-maskable interrupt, Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
- Low-Power: Idle and Standby Sleep modes, SleepWalking peripherals
- Peripherals: Hardware Divide and Square Root Accelerator (DIVAS), 12-channel Direct Memory Access Controller (DMAC), 12-channel Event System, Up to eight 16-bit Timer/Counters (TC), configurable as either (see Note): One 16-bit TC with compare/capture channels, One 8-bit TC with compare/capture channels, One 32-bit TC with compare/capture channels, by using two TCs, Two 24-bit and one 16-bit Timer/Counter for Control (TCC), with extended functions: Up to eight PWM channels on each 24-bit TCC, Up to two PWM channels on each 16-bit TCC, Up to four compare channels with optional complementary output, Generation of synchronized pulse width modulation (PWM) pattern across port pins, Deterministic fault protection, fast decay and configurable dead-time between complementary output, Dithering that increase resolution with up to 5 bit and reduce quantization error, Frequency Meter (The division reference clock is only available in the SAM C2), 32-bit Real Time Counter (RTC) with clock/calendar function, Watchdog Timer (WDT), CRC-32 generator, Up to two Controller Area Network (CAN) interfaces in the SAM C21: CAN 2.0A/B and CAN-FD (ISO 11898-1:2015), Each CAN interface have two selectable pin locations to switch between two external CAN transceivers (without the need for an external switch), Up to eight Serial Communication Interfaces (SERCOM), each configurable to operate as either: USART with full-duplex and single-wire half-duplex configuration, I²C up to 3.4 MHz (Except SERCOM6 and SERCOM7), SPI, LIN host/client, RS-485, PMBus, One Configurable Custom Logic (CCL), Up to Two 12-bit, 1 Msps Analog-to-Digital Converter (ADC) with up to 12 channels each (20 unique channels), Differential and single-ended input, Automatic offset and gain error compensation, Oversampling and decimation in hardware to support 13, 14, 15 or 16-bit resolution, One 16-bit Sigma-Delta Analog-to-Digital Converter (SDADC) with up to 3 differential channels in the SAM C21, 10-bit, 350 ksps Digital-to-Analog Converter (DAC) in the SAM C21, Up to four Analog Comparators (AC) with Window Compare function, Integrated Temperature Sensor in the SAM C21, Peripheral Touch Controller (PTC) – 256-Channel capacitive touch and proximity sensing
- I/O: Up to 84 programmable I/O pins
- Qualification: AEC - Q100 Grade 1 (-40°C to 125°C)
- General: Drop in compatible with SAM D20 and SAM D21 (Only applicable to 32-pin, 48-pin, and 64-pin TQFP and VQFN packages)
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 5.5986 | $ 5.60 |
| 10+ | $ 5.4216 | $ 54.22 |
| 30+ | $ 5.3047 | $ 159.14 |
| 100+ | $ 5.1862 | $ 518.62 |
Standard Packaging4000/Full Reel | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-64-EP(9x9) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 12bit;16bit | |
| Voltage - Supply | 2.7V~5.5V | |
| Program Storage Size | 256KB | |
| CPU Core | ARM Cortex-M Series | |
| CPU Maximum Speed | 48MHz | |
| Number of I/O | 52 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | QFN-64-EP(9x9) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 12bit;16bit |
| Type | Description | |
|---|---|---|
| Voltage - Supply | 2.7V~5.5V | |
| Program Storage Size | 256KB | |
| CPU Core | ARM Cortex-M Series | |
| CPU Maximum Speed | 48MHz | |
| Number of I/O | 52 |
Report an ErrorShow similar products (0) >
Features
AI Translation
- Operating Conditions: 2.7V – 5.5V, -40°C to +125°C, DC to 48 MHz; -40°C to +85°C, DC to 64 MHz
- Core Arm Cortex-M0+ CPU running at up to 48 MHz or 64 MHz: Single-cycle hardware multiplier, Micro Trace Buffer, Memory Protection Unit (MPU)
- Memories: 32/64/128/256 KB in-system self-programmable Flash, 1/2/4/8 KB independent self-programmable Flash for EEPROM emulation, 4/8/16/32 KB SRAM main memory
- System: Power-on Reset (POR) and Brown-out Detection (BOD), Internal and external clock options with 48 MHz to 96 MHz Fractional Digital Phase Locked Loop (FDPLL96M), External Interrupt Controller (EIC) (Interrupt pin debouncing is only available in SAM C20/C21 N), 16 external interrupts, Hardware debouncing (only available in SAM C20/C21 N), One non-maskable interrupt, Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
- Low-Power: Idle and Standby Sleep modes, SleepWalking peripherals
- Peripherals: Hardware Divide and Square Root Accelerator (DIVAS), 12-channel Direct Memory Access Controller (DMAC), 12-channel Event System, Up to eight 16-bit Timer/Counters (TC), configurable as either (see Note): One 16-bit TC with compare/capture channels, One 8-bit TC with compare/capture channels, One 32-bit TC with compare/capture channels, by using two TCs, Two 24-bit and one 16-bit Timer/Counter for Control (TCC), with extended functions: Up to eight PWM channels on each 24-bit TCC, Up to two PWM channels on each 16-bit TCC, Up to four compare channels with optional complementary output, Generation of synchronized pulse width modulation (PWM) pattern across port pins, Deterministic fault protection, fast decay and configurable dead-time between complementary output, Dithering that increase resolution with up to 5 bit and reduce quantization error, Frequency Meter (The division reference clock is only available in the SAM C2), 32-bit Real Time Counter (RTC) with clock/calendar function, Watchdog Timer (WDT), CRC-32 generator, Up to two Controller Area Network (CAN) interfaces in the SAM C21: CAN 2.0A/B and CAN-FD (ISO 11898-1:2015), Each CAN interface have two selectable pin locations to switch between two external CAN transceivers (without the need for an external switch), Up to eight Serial Communication Interfaces (SERCOM), each configurable to operate as either: USART with full-duplex and single-wire half-duplex configuration, I²C up to 3.4 MHz (Except SERCOM6 and SERCOM7), SPI, LIN host/client, RS-485, PMBus, One Configurable Custom Logic (CCL), Up to Two 12-bit, 1 Msps Analog-to-Digital Converter (ADC) with up to 12 channels each (20 unique channels), Differential and single-ended input, Automatic offset and gain error compensation, Oversampling and decimation in hardware to support 13, 14, 15 or 16-bit resolution, One 16-bit Sigma-Delta Analog-to-Digital Converter (SDADC) with up to 3 differential channels in the SAM C21, 10-bit, 350 ksps Digital-to-Analog Converter (DAC) in the SAM C21, Up to four Analog Comparators (AC) with Window Compare function, Integrated Temperature Sensor in the SAM C21, Peripheral Touch Controller (PTC) – 256-Channel capacitive touch and proximity sensing
- I/O: Up to 84 programmable I/O pins
- Qualification: AEC - Q100 Grade 1 (-40°C to 125°C)
- General: Drop in compatible with SAM D20 and SAM D21 (Only applicable to 32-pin, 48-pin, and 64-pin TQFP and VQFN packages)
C124135 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| ATSAMD20J18A-MNT | MICROCHIP | QFN-64-EP(9x9) | 0 | $ 3.4655 | ||
| ATSAMD21J18A-MFT | MICROCHIP | QFN-64-EP(9x9) | 0 | $ 4.5517 |