Cirrus Logic CS2000P-DZZR

The CS2000-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. It is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for both frequency synthesis/clock generation from a stable reference clock as well as generation of a low-jitter clock relative to an external noisy synchronization clock with frequencies as low as 50 Hz. The CS2000-OTP has many configuration options which are set once prior to runtime. At runtime there are three hardware configuration pins available for mode and feature selection.

• Delta-Sigma Fractional-N Frequency Synthesis Generates a Low Jitter 6 - 75 MHz Clock from an 8 - 75 MHz Reference Clock
• Clock Multiplier / Jitter Reduction Generates a Low Jitter 6 - 75 MHz Clock from a Jittery 50 Hz to 30 MHz Clock Source
• Highly Accurate PLL Multiplication Factor Maximum Error Less Than 1 PPM in High-Resolution Mode
• One-Time Programmability Configurable Hardware Control Pins Configurable Auxiliary Output
• Flexible Sourcing of Reference Clock External Oscillator or Clock Source Supports Inexpensive Local Crystal
• Minimal Board Space Required No External Analog Loop-filter Components