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ST STEF12SPURRoHS

Manufacturer
ST
MPN
STEF12SPUR
LCSC Part #
C1857504
Packaging
DFN-10-EP(3x3)
Customer #
Key Attributes
10V~13.8V DFN-10-EP(3x3) Current Regulation/Management RoHS
Datasheetpdf iconST STEF12SPUR
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QtyUnit Price(Reference Only)Total Amount
1+$ 1.2988$ 1.30
10+$ 1.0751$ 10.75
30+$ 0.9533$ 28.60
100+$ 0.7774$ 77.74
Standard Packaging3000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Power Management (PMIC)/Current Regulation/Management
ManufacturerST
PackagingDFN-10-EP(3x3)
Features-
FET TypeIntegrated FET
Trigger Current-
Width3mm
Length3mm
Threshold Voltage-
Height0.9mm
Peak Output Current(Source)-
Number of Channels-
Voltage - Supply10V~13.8V
RDS(on)40mΩ
Peak Output Current(Sink)-
Operating Temperature-40℃~+125℃
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Introduction

AI Translation

The STEF12S is an integrated electronic fuse optimized to monitor the 12 V DC power lines. When connected in series to the main power rail, it is able to precisely detect and react to overcurrent and overvoltage conditions. When an overload condition occurs, the device limits the output current to a safe value defined by the user. If the anomalous overload condition persists, the device goes into an open state, disconnecting the load from the power supply. In case of overvoltage on the input, the device regulates the output to a preset safe value. Undervoltage lockout prevents the load from malfunction, keeping the device off if the rail voltage is too low. The STEF12S features the adjustable turn-on slew-rate, which is useful to keep the in-rush current under control during startup and hot-swap operations. On the DFN10 package a dedicated pin provides a gate control for an external optional N-channel Power FET, used to implement the reverse current blocking in case of input voltage loss. The STEF05S is a companion chip for the 5 V rails, useful to implement a complete power rail control in data-storage applications.

Features

AI Translation
  • 15 V typical output overvoltage clamp
  • Absolute maximum voltage of 25 V
  • Adjustable current limit
  • Thermal protection
  • Input undervoltage lockout
  • Low inrush current during startup
  • Integrated 40 mΩ Power FET
  • En/fault pin
  • Adjustable slew rate for output voltage
  • Gate control pin for reverse current blocking FET (DFN10 package)
  • TSOT23-8L and DFN10 (3x3 mm) packages
  • Latch (STEF12S) or autoretry (STEF12SA) versions

Applications

AI Translation
  • Hard Disk and SSD drives
  • Hard disk array
  • Hot-swap board
  • Hot-plug protection