SILICON LABS SI5355A-B01112-GM
| Manufacturer | |
| MPN | SI5355A-B01112-GM |
| LCSC Part # | C1536294 |
| Packaging | QFN-24-EP(4x4) |
| Customer # | |
| Key Attributes | 200MHz 1.71V~3.63V CMOS 8 QFN-24-EP(4x4) Clock Generators, PLLs, Frequency Synthesizers |
| Datasheet |  SILICON LABS SI5355A-B01112-GM |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | SILICON LABS | |
| Packaging | QFN-24-EP(4x4) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock/Oscillator | External | |
| Output Frequency(Max) | 200MHz | |
| Voltage - Supply | 1.71V~3.63V | |
| Period Jitter, Peak-to-Peak | 40ps;50ps | |
| Phase Offset | Not supported | |
| Input | CMOS | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop;Built-in clock monitoring and loss-of-lock detection;Multi-source clock input | |
| Output Level | CMOS | |
| Phase Jitter | 2ps | |
| Number of Outputs | 8 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | SILICON LABS | |
| Packaging | QFN-24-EP(4x4) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock/Oscillator | External | |
| Output Frequency(Max) | 200MHz | |
| Voltage - Supply | 1.71V~3.63V |
| Type | Description | |
|---|---|---|
| Period Jitter, Peak-to-Peak | 40ps;50ps | |
| Phase Offset | Not supported | |
| Input | CMOS | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop;Built-in clock monitoring and loss-of-lock detection;Multi-source clock input | |
| Output Level | CMOS | |
| Phase Jitter | 2ps | |
| Number of Outputs | 8 |
Introduction
The Si5355 is a highly flexible clock generator capable of synthesizing four completely non-integer related frequencies up to 200 MHz. The device has four banks of outputs with each bank supporting two CMOS outputs at the same frequency. Using Silicon Laboratories' patented MultiSynth fractional divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis error regardless of configuration, enabling the replacement of multiple clock ICs and crystal oscillators with a single device. Through a flexible web configuration utility called ClockBuilder™, factory-customized pin-controlled Si5355 devices are available in two weeks without minimum order quantity restrictions. The Si5355 supports up to three independent, pin-selectable device configurations, enabling one device to replace three separate clock ICs.
Features
- Generates any frequency from 1 to 200 MHz on each of the 4 output banks
- Eight CMOS clock outputs
- Guaranteed 0 ppm frequency synthesis error for any combination of frequencies
- 25 or 27 MHz xtal or 5 - 200 MHz input clk
- Five programmable control pins (output enable, frequency select, reset)
- Separate OEB pins to disable individual banks or all outputs
- Loss of signal output
- Low 50 ps (typ) pk - pk period jitter
- Phase jitter: 2 ps rms 12 kHz–20 MHz
- Excellent PSRR performance eliminates need for external power supply filtering
- Low power: 45 mA (core)
- Core VDD: 1.8, 2.5, or 3.3 V
- Separate VDDO for each bank of outputs: 1.8, 2.5, or 3.3 V
- Small size: 4×4 mm 24 - QFN
- Industrial temperature range: –40 to +85 °C
- Custom versions available using ClockBuilder web utility
- Samples available in 2 weeks
Applications
- Printers
- Audio/video
- Networking Communications
- Storage
- Switches/routers
- Computing
- Servers OC - 3/OC - 12 line cards
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 5.0765 | $ 5.08 |
| 200+ | $ 1.9649 | $ 392.98 |
| 500+ | $ 1.8954 | $ 947.70 |
| 1,000+ | $ 1.8615 | $ 1861.50 |
Standard Packaging75/Full Tray | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | SILICON LABS | |
| Packaging | QFN-24-EP(4x4) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock/Oscillator | External | |
| Output Frequency(Max) | 200MHz | |
| Voltage - Supply | 1.71V~3.63V | |
| Period Jitter, Peak-to-Peak | 40ps;50ps | |
| Phase Offset | Not supported | |
| Input | CMOS | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop;Built-in clock monitoring and loss-of-lock detection;Multi-source clock input | |
| Output Level | CMOS | |
| Phase Jitter | 2ps | |
| Number of Outputs | 8 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | SILICON LABS | |
| Packaging | QFN-24-EP(4x4) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock/Oscillator | External | |
| Output Frequency(Max) | 200MHz | |
| Voltage - Supply | 1.71V~3.63V |
| Type | Description | |
|---|---|---|
| Period Jitter, Peak-to-Peak | 40ps;50ps | |
| Phase Offset | Not supported | |
| Input | CMOS | |
| Features | On-chip VCO/DCO;Built-in phase-locked loop;Built-in clock monitoring and loss-of-lock detection;Multi-source clock input | |
| Output Level | CMOS | |
| Phase Jitter | 2ps | |
| Number of Outputs | 8 |
Introduction
The Si5355 is a highly flexible clock generator capable of synthesizing four completely non-integer related frequencies up to 200 MHz. The device has four banks of outputs with each bank supporting two CMOS outputs at the same frequency. Using Silicon Laboratories' patented MultiSynth fractional divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis error regardless of configuration, enabling the replacement of multiple clock ICs and crystal oscillators with a single device. Through a flexible web configuration utility called ClockBuilder™, factory-customized pin-controlled Si5355 devices are available in two weeks without minimum order quantity restrictions. The Si5355 supports up to three independent, pin-selectable device configurations, enabling one device to replace three separate clock ICs.
Features
- Generates any frequency from 1 to 200 MHz on each of the 4 output banks
- Eight CMOS clock outputs
- Guaranteed 0 ppm frequency synthesis error for any combination of frequencies
- 25 or 27 MHz xtal or 5 - 200 MHz input clk
- Five programmable control pins (output enable, frequency select, reset)
- Separate OEB pins to disable individual banks or all outputs
- Loss of signal output
- Low 50 ps (typ) pk - pk period jitter
- Phase jitter: 2 ps rms 12 kHz–20 MHz
- Excellent PSRR performance eliminates need for external power supply filtering
- Low power: 45 mA (core)
- Core VDD: 1.8, 2.5, or 3.3 V
- Separate VDDO for each bank of outputs: 1.8, 2.5, or 3.3 V
- Small size: 4×4 mm 24 - QFN
- Industrial temperature range: –40 to +85 °C
- Custom versions available using ClockBuilder web utility
- Samples available in 2 weeks
Applications
- Printers
- Audio/video
- Networking Communications
- Storage
- Switches/routers
- Computing
- Servers OC - 3/OC - 12 line cards
C1536294 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |