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EDA ModelsEasyEDA
ST M95512-WMN6TP
| Manufacturer | |
| MPN | M95512-WMN6TP |
| LCSC Part # | C7567 |
| Packaging | SOIC-8 |
| Customer # | |
| Key Attributes | 512Kbit Serial SPI Bus EEPROM With High Speed Clock |
| Datasheet | ST M95512-WMN6TP |
| RoHS Compliance | 3 documents available |
| Alternative Parts | 4 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | SOIC-8 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Built-in write enable latch (WEL);Software write protection function | |
| Memory Size | 512Kbit | |
| Voltage - Supply | 2.5V~5.5V;5mA | |
| Clock Frequency | 10MHz | |
| Access Time | - | |
| Data Retention - TDR (Year) | 40 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Standby Supply Current | 5uA | |
| Write Cycle Endurance | 100,000 cycles | |
| Interface | SPI |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | SOIC-8 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Built-in write enable latch (WEL);Software write protection function | |
| Memory Size | 512Kbit | |
| Voltage - Supply | 2.5V~5.5V;5mA |
| Type | Description | |
|---|---|---|
| Clock Frequency | 10MHz | |
| Access Time | - | |
| Data Retention - TDR (Year) | 40 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Standby Supply Current | 5uA | |
| Write Cycle Endurance | 100,000 cycles | |
| Interface | SPI |
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Introduction
AI Translation
These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 65536 × 8 bit. The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q. The device is selected when Chip Select (S (overline)) is taken Low. Communications with the device can be interrupted using Hold (HOLD).
Features
AI Translation
- Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes)
- Single Supply Voltage: 2.5 to 5.5V for M95512 - W; 1.8 to 5.5V for M95512 - R
- High Speed 10MHz Clock Rate
- 5ms Write Time
- Status Register Hardware Protection of the Status Register
- BYTE and PAGE WRITE (up to 128 Bytes)
- Self - Timed Programming Cycle
- Adjustable Size Read - Only EEPROM Area
- Enhanced ESD Protection
- More than 100,000 Erase/Write Cycles
- More than 40 - Year Data Retention
In-Stock: 2,482
2,482 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
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| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.6064 | $ 0.61 |
| 10+ | $ 0.4917 | $ 4.92 |
| 30+ | $ 0.4327 | $ 12.98 |
| 100+ | $ 0.3753 | $ 37.53 |
| 500+ | $ 0.3409 | $ 170.45 |
| 1,000+ | $ 0.3229 | $ 322.90 |
Standard Packaging2500/Full Reel | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | SOIC-8 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Built-in write enable latch (WEL);Software write protection function | |
| Memory Size | 512Kbit | |
| Voltage - Supply | 2.5V~5.5V;5mA | |
| Clock Frequency | 10MHz | |
| Access Time | - | |
| Data Retention - TDR (Year) | 40 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Standby Supply Current | 5uA | |
| Write Cycle Endurance | 100,000 cycles | |
| Interface | SPI |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | SOIC-8 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Built-in write enable latch (WEL);Software write protection function | |
| Memory Size | 512Kbit | |
| Voltage - Supply | 2.5V~5.5V;5mA |
| Type | Description | |
|---|---|---|
| Clock Frequency | 10MHz | |
| Access Time | - | |
| Data Retention - TDR (Year) | 40 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Standby Supply Current | 5uA | |
| Write Cycle Endurance | 100,000 cycles | |
| Interface | SPI |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 65536 × 8 bit. The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q. The device is selected when Chip Select (S (overline)) is taken Low. Communications with the device can be interrupted using Hold (HOLD).
Features
AI Translation
- Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes)
- Single Supply Voltage: 2.5 to 5.5V for M95512 - W; 1.8 to 5.5V for M95512 - R
- High Speed 10MHz Clock Rate
- 5ms Write Time
- Status Register Hardware Protection of the Status Register
- BYTE and PAGE WRITE (up to 128 Bytes)
- Self - Timed Programming Cycle
- Adjustable Size Read - Only EEPROM Area
- Enhanced ESD Protection
- More than 100,000 Erase/Write Cycles
- More than 40 - Year Data Retention
C7567 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| CAV25512VE-GT3 | onsemi | SOIC-8 | 88 | $ 1.1534 | ||
| BR25A512FJ-3MGE2 | ROHM | SOIC-8 | 0 | $ 1.2243 | ||
| BR25G512FJ-3GE2 | ROHM | SOIC-8 | 0 | $ 0.6959 | ||
| S-25C512A0I-J8T1U4 | ABLIC | SOP-8 | 0 | $ 1.1546 |