Images for reference only
EDA ModelsEasyEDA
GSI Technology GS832036AGT-250I
| Manufacturer | GSI TechnologyAsian Brands |
| MPN | GS832036AGT-250I |
| LCSC Part # | C7200440 |
| Packaging | TQFP-100(14x20) |
| Customer # | |
| Key Attributes | 36Mbit TQFP-100(14x20) Memory RoHS |
| Datasheet | GSI Technology GS832036AGT-250I |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | GSI Technology | |
| Packaging | TQFP-100(14x20) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Auto power-down function | |
| Memory Size | 36Mbit | |
| Voltage - Supply | -;- | |
| Access Time | - | |
| Standby Supply Current | 75mA | |
| Interface | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | GSI Technology | |
| Packaging | TQFP-100(14x20) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Auto power-down function |
| Type | Description | |
|---|---|---|
| Memory Size | 36Mbit | |
| Voltage - Supply | -;- | |
| Access Time | - | |
| Standby Supply Current | 75mA | |
| Interface | - |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
The GS832018/32/36AGT is a 37,748,736-bit high-performance synchronous SRAM with a 2-bit burst address counter. Originally developed to support L2 cache applications for high-performance CPUs, the device is now applicable to synchronous SRAM applications ranging from DSP main memory to network chipset support.
Features
AI Translation
- FT pin supports user-configurable flow-through or pipelined operation
- Single-cycle deselect operation
- 2.5V or 3.3V core supply with ±10% tolerance
- 2.5V or 3.3V I/O supply
- LBO pin for linear or interleaved burst mode
- Internal input resistors on mode pins allow pins to float
- Default configuration: interleaved pipeline mode
- Byte write and/or global write operation
- Internal self-timed write cycle
- Automatic power-down for portable applications
- RoHS-compliant 100-pin TQFP
Applications
AI Translation
- Secondary cache applications for high-performance CPUs
- Synchronous SRAM applications
- DSP main memory
- Network chipset support
Out of Stock
Notify Me
Minimum: 1Multiple: 1Sales Unit: Piece
Add to BOM List
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 111.0207 | $ 111.02 |
| 198+ | $ 44.2988 | $ 8771.16 |
| 504+ | $ 42.8179 | $ 21580.22 |
| 1,008+ | $ 42.0862 | $ 42422.89 |
Standard Packaging18/Full Tray | ||
Better price for more quantity?
$
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | GSI Technology | |
| Packaging | TQFP-100(14x20) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Auto power-down function | |
| Memory Size | 36Mbit | |
| Voltage - Supply | -;- | |
| Access Time | - | |
| Standby Supply Current | 75mA | |
| Interface | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | GSI Technology | |
| Packaging | TQFP-100(14x20) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Auto power-down function |
| Type | Description | |
|---|---|---|
| Memory Size | 36Mbit | |
| Voltage - Supply | -;- | |
| Access Time | - | |
| Standby Supply Current | 75mA | |
| Interface | - |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
The GS832018/32/36AGT is a 37,748,736-bit high-performance synchronous SRAM with a 2-bit burst address counter. Originally developed to support L2 cache applications for high-performance CPUs, the device is now applicable to synchronous SRAM applications ranging from DSP main memory to network chipset support.
Features
AI Translation
- FT pin supports user-configurable flow-through or pipelined operation
- Single-cycle deselect operation
- 2.5V or 3.3V core supply with ±10% tolerance
- 2.5V or 3.3V I/O supply
- LBO pin for linear or interleaved burst mode
- Internal input resistors on mode pins allow pins to float
- Default configuration: interleaved pipeline mode
- Byte write and/or global write operation
- Internal self-timed write cycle
- Automatic power-down for portable applications
- RoHS-compliant 100-pin TQFP
Applications
AI Translation
- Secondary cache applications for high-performance CPUs
- Synchronous SRAM applications
- DSP main memory
- Network chipset support
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B2B |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B2B |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |