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ADI LTC2145CUP-12#TRPBF

Fabricante
N.º de pieza fab.
LTC2145CUP-12#TRPBF
Nº LCSC
C679367
Emb.
QFN-64-EP(9x9)
Número de Cliente
Atrib. clave
SPI QFN-64-EP(9x9) Analog to Digital Converters (ADC) RoHS
Hoja de DatosADI LTC2145CUP-12#TRPBF
Cumplimiento RoHS1 documentos disponibles
Agotado
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Mínimo: 1Múltiplo: 1Unidad de venta: Piece
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Cant.Prec. unit.(Solo como referencia)Importo total
1+$ 58.2197$ 58.22
200+$ 22.5301$ 4506.02
500+$ 21.7383$ 10869.15
1,000+$ 21.3478$ 21347.80
Encapsulado Estándar2000/Full Reel
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Especificaciones del Producto

Todo
TipoDescripción
CategoríaIntegrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC)
FabricanteADI
Emb.QFN-64-EP(9x9)
Operating Temperature0℃~+70℃
FeaturesProgrammable gain;Built-in reference source
InterfaceSPI
Quiescent Current (Iq)-
Resolution(Bits)12;125MHz
Voltage - Supply1.7V~1.9V;1.1V~1.9V
DNL (LSB)0.1LSB
Number of Channels2
ADC architecture-
Integral non - linearity0.3LSB

Descripción

Traducción por IA

The LTC2145-12/LTC2144-12/LTC2143-12 are 2-channel simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.6dB SNR and 89dB spurious free dynamic range (SFDR). Ultralow jitter of 0.08psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.3LSBRMS. The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC- inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.

Características

Traducción por IA
  • 2-Channel Simultaneously Sampling ADC
  • 70.6dB SNR
  • 89dB SFDR
  • Low Power: 183mW/144mW/109mW Total, 92mW/72mW/55mW per Channel
  • Single 1.8V Supply
  • CMOS, DDR CMOS, or DDR LVDS Outputs
  • Selectable Input Ranges: 1VP-P to 2VP-P
  • 750MHz Full Power Bandwidth S/H
  • Optional Data Output Randomizer
  • Optional Clock Duty Cycle Stabilizer
  • Shutdown and Nap Modes
  • Serial SPI Port for Configuration
  • 64-Pin (9mmx9mm) QFN Package

Aplicaciones

Traducción por IA
  • Communications
  • Cellular Base Stations
  • Software Defined Radios
  • Portable Medical Imaging
  • Multi-Channel Data Acquisition
  • Nondestructive Testing