LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
Nexperia 74LVC1G06GN,132 product image
Images for reference only

Nexperia 74LVC1G06GN,132

Manufacturer
MPN
74LVC1G06GN,132
LCSC Part #
C548207
Packaging
XSON-6(0.9x1)
Customer #
Key Attributes
Schmitt trigger 1.65V~5.5V 1.7ns@5.5V,50pF 4uA 1 XSON-6(0.9x1) Gates and Inverters RoHS
DatasheetNexperia 74LVC1G06GN,132
Out of Stock
Notify Me
Minimum: 1Multiple: 1Sales Unit: Piece
Add to BOM List
QtyUnit Price(Reference Only)Total Amount
1+$ 0.0568$ 0.06
10+$ 0.0462$ 0.46
30+$ 0.0409$ 1.23
100+$ 0.037$ 3.70
500+$ 0.0338$ 16.90
1,000+$ 0.0322$ 32.20
Standard Packaging5000/Full Reel
Better price for more quantity?
$

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerNexperia
PackagingXSON-6(0.9x1)
output typeOpen-drain
Input TypeSchmitt trigger
Logic Family74LVC
Voltage - Supply1.65V~5.5V
Output Logic Level - Low-
Propagation Delay1.7ns@5.5V,50pF
Input Logic Level - High-
Input Logic Level - Low-
Operating Temperature-40℃~+125℃
Features-
Output Logic Level - High-
Quiescent Current(Iq)4uA
Number of Channels1
Current - Output High(IOH)-
Current - Output Low(IOL)24mA

Introduction

AI Translation

The 74LVC1G06 is a single inverter with open-drain output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Overvoltage tolerant inputs to 5.5 V
  • IOFF circuitry provides partial Power-down mode operation
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +125 ℃