MICROCHIP ATF1502ASV-15AU44

The ATF1502ASV is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. With 32 logic macrocells and up to 36 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1502ASV’s enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications. The ATF1502ASV has up to 32 bi-directional I/O pins and four dedicated input pins, depending on the type of device package selected. Each dedicated pin can also serve as a global control signal, register clock, register reset or output enable. Each of these control signals can be selected for use individually within each macrocell. Each of the 32 macrocells generates a buried feedback that goes to the global bus. Each input and I/O pin also feeds into the global bus. The switch matrix in each logic block then selects 40 individual signals from the global bus. Each macrocell also generates a foldback logic term that goes to a regional bus. Cascade logic between macrocells in the ATF1502ASV allows fast, efficient generation of complex logic functions. The ATF1502ASV contains four such logic chains, each capable of creating sum term logic with a fan-in of up to 40 product terms. The ATF1502ASV macrocell is flexible enough to support highly complex logic functions operating at high speed. The macrocell consists of five sections: product terms and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop, output select and enable, and logic array inputs. Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse, when programmed, protects the contents of the ATF1502ASV. Two bytes (16 bits) of User Signature are accessible to the user for purposes such as storing project name, part number, revision or date. The User Signature is accessible regardless of the state of the security fuse. The ATF1502ASV device is an in-system programmable (ISP) device. It uses the industry standard 4-pin JTAG interface (IEEE Std. 1149.1), and is fully compliant with JTAG’s Boundary-scan Description Language (BSDL). ISP allows the device to be programmed without removing it from the printed circuit board. In addition to simplifying the manufacturing flow, ISP also allows design modifications to be made in the field via software.

• High-density, High-performance, Electrically-erasable Complex Programmable Logic Device
• 3.0 to 3.6V Operating Range
• 32 Macrocells
• 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
• 44 Pins
• 15 ns Maximum Pin-to-pin Delay
• Registered Operation up to 77 MHz
• Enhanced Routing Resources
• In-System Programmability (ISP) via JTAG
• Flexible Logic Macrocell – D/T Latch Configurable Flip-flops – Global and Individual Register Control Signals – Global and Individual Output Enable – Programmable Output Slew Rate – Programmable Output Open Collector Option – Maximum Logic Utilization by Burying a Register with a COM Output
• Advanced Power Management Features – Pin-controlled 0.75 mA Standby Mode – Programmable Pin-keeper Inputs and I/Os – Reduced-power Feature per Macrocell
• Available in Commercial and Industrial Temperature Ranges
• Available in 44-lead PLCC and TQFP
• Advanced EEPROM Technology – 100% Tested – Completely Reprogrammable – 10,000 Program/Erase Cycles – 20-year Data Retention – 2000V ESD Protection – ~200 mA Latch-up Immunity
• JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
• PCI-compliant
• Security Fuse Feature
• Green (Pb/Halide-fee/RoHS Compliant) Package Options
• Improved Connectivity (Additional Feedback Routing, Alternate Input Ro
• Output Enable Product Terms
• D Latch Mode
• Combinatorial Output with Registered Feedback within Any Macrocell
• Three Global Clock Pins
• Fast Registered Input from Product Term
• Programmable “Pin-keeper” Option
• Vcc Power-up Reset Option
• Pull-up Option on JTAG Pins TMS and TDI
• Advanced Power Management Features – Individual Macrocell Power Option