ST STM32F205RBT6
| Manufacturer | |
| MPN | STM32F205RBT6 |
| LCSC Part # | C8364 |
| Packaging | LQFP-64(10x10) |
| Customer # | |
| Key Attributes | ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera |
| Datasheet | ST STM32F205RBT6 |
| RoHS Compliance | 3 documents available |
| Alternative Parts | 5 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-64(10x10) | |
| DAC (Bit) | 12bit | |
| ADC (Bit) | 12bit | |
| Number of I/O | 51 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 1.8V~3.6V | |
| Program Memory Type | FLASH | |
| EEPROM | - | |
| Program Storage Size | 128KB | |
| CPU Core | ARM Cortex-M3 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-64(10x10) | |
| DAC (Bit) | 12bit | |
| ADC (Bit) | 12bit | |
| Number of I/O | 51 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 1.8V~3.6V |
| Type | Description | |
|---|---|---|
| Program Memory Type | FLASH | |
| EEPROM | - | |
| Program Storage Size | 128KB | |
| CPU Core | ARM Cortex-M3 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
The product features an ARM 32-bit Cortex-M3 CPU at up to 120MHz, equipped with an Adaptive Real-Time Accelerator (ART Accelerator) enabling zero wait-state execution performance from Flash memory, along with a Memory Protection Unit (MPU), delivering 150 DMIPS or 1.25 DMIPS/MHz (Dhrystone 2.1).
Features
AI Translation
- Core: ARM 32-bit Cortex-M3 CPU (120 MHz max) with Adaptive real-time accelerator (ART Accelerator allowing 0-wait state execution performance from Flash memory, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)
- Up to 1 Mbyte of Flash memory
- 512 bytes of OTP memory
- Up to 128 + 4 Kbytes of SRAM
- Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories
- LCD parallel interface, 8080/6800 modes
- From 1.8 to 3.6 V application supply + I/Os
- POR, PDR, PVD and BOR
- 4 to 26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC
- 32 kHz oscillator for RTC with calibration
- Internal 32 kHz RC with calibration
- Sleep, Stop and Standby modes
- VBAT supply for RTC, 20x32 bit backup registers, and optional 4 KB backup SRAM
- 3x12-bit, 0.5 μs ADCs with up to 24 channels and up to 6 MSPS in triple interleaved mode
- 2x12-bit D/A converters
- General-purpose DMA: 16-stream controller with centralized FIFOs and burst support
- Up to twelve 16-bit and two 32-bit timers, up to 120 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Debug mode: Serial wire debug (SWD), JTAG, and Cortex-M3 Embedded Trace Macrocell
- Up to 140 I/O ports with interrupt capability: Up to 136 fast I/Os up to 60 MHz, Up to 138 5 V-tolerant I/Os
- Up to 15 communication interfaces
- Up to 3xI²C interfaces (SMBus/PMBus)
- Up to 4 USARTs and 2 UARTs (7.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem ctrl)
- Up to 3 SPIs (30 Mbit/s), 2 with muxed I²S to achieve audio class accuracy via audio PLL or external PLL
- 2xCAN interfaces (2.0B Active)
- SDIO interface
- Advanced connectivity
- USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
- 96-bit unique ID
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-64(10x10) | |
| DAC (Bit) | 12bit | |
| ADC (Bit) | 12bit | |
| Number of I/O | 51 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 1.8V~3.6V | |
| Program Memory Type | FLASH | |
| EEPROM | - | |
| Program Storage Size | 128KB | |
| CPU Core | ARM Cortex-M3 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-64(10x10) | |
| DAC (Bit) | 12bit | |
| ADC (Bit) | 12bit | |
| Number of I/O | 51 | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 1.8V~3.6V |
| Type | Description | |
|---|---|---|
| Program Memory Type | FLASH | |
| EEPROM | - | |
| Program Storage Size | 128KB | |
| CPU Core | ARM Cortex-M3 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
The product features an ARM 32-bit Cortex-M3 CPU at up to 120MHz, equipped with an Adaptive Real-Time Accelerator (ART Accelerator) enabling zero wait-state execution performance from Flash memory, along with a Memory Protection Unit (MPU), delivering 150 DMIPS or 1.25 DMIPS/MHz (Dhrystone 2.1).
Features
AI Translation
- Core: ARM 32-bit Cortex-M3 CPU (120 MHz max) with Adaptive real-time accelerator (ART Accelerator allowing 0-wait state execution performance from Flash memory, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)
- Up to 1 Mbyte of Flash memory
- 512 bytes of OTP memory
- Up to 128 + 4 Kbytes of SRAM
- Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories
- LCD parallel interface, 8080/6800 modes
- From 1.8 to 3.6 V application supply + I/Os
- POR, PDR, PVD and BOR
- 4 to 26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC
- 32 kHz oscillator for RTC with calibration
- Internal 32 kHz RC with calibration
- Sleep, Stop and Standby modes
- VBAT supply for RTC, 20x32 bit backup registers, and optional 4 KB backup SRAM
- 3x12-bit, 0.5 μs ADCs with up to 24 channels and up to 6 MSPS in triple interleaved mode
- 2x12-bit D/A converters
- General-purpose DMA: 16-stream controller with centralized FIFOs and burst support
- Up to twelve 16-bit and two 32-bit timers, up to 120 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Debug mode: Serial wire debug (SWD), JTAG, and Cortex-M3 Embedded Trace Macrocell
- Up to 140 I/O ports with interrupt capability: Up to 136 fast I/Os up to 60 MHz, Up to 138 5 V-tolerant I/Os
- Up to 15 communication interfaces
- Up to 3xI²C interfaces (SMBus/PMBus)
- Up to 4 USARTs and 2 UARTs (7.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem ctrl)
- Up to 3 SPIs (30 Mbit/s), 2 with muxed I²S to achieve audio class accuracy via audio PLL or external PLL
- 2xCAN interfaces (2.0B Active)
- SDIO interface
- Advanced connectivity
- USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
- 96-bit unique ID
C8364 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |



