STC Micro STC12C5612AD-35I-SOP28

Manufacturer	STC MicroAsian Brands
MPN	STC12C5612AD-35I-SOP28
LCSC Part #	C74822
Packaging	SOP-28-300mil
Customer #
Key Attributes	51 Series 35MHz SOP-28-300mil Microcontrollers
Datasheet	STC Micro STC12C5612AD-35I-SOP28
Alternative Parts	2

Products Specifications

All

Type	Description
Category	Integrated Circuits (ICs)/Embedded/Microcontrollers
Manufacturer	STC Micro
Packaging	SOP-28-300mil
ADC (Bit)	10bit
Number of I/O	23
Program Memory Type	FLASH
Voltage - Supply	3.5V~5.5V
Program Storage Size	12KB
CPU Core	51 Series
CPU Maximum Speed	35MHz

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Features

AI Translation

Large on-chip 4096-byte RAM data memory; high-speed: 1 clock/machine cycle; enhanced 8051 core, 7–12× faster than standard 8051, also 20% faster than STC's early 1T series MCUs (e.g., STC12/11/10 series)
Wide operating voltage: 2.5V–5.5V
Low-power design: slow-speed mode, idle mode, power-down mode (wake-up via external interrupt or internal power-down wake-up timer)
No external reset required; 16 selectable reset threshold voltages during ISP programming; built-in high-reliability reset circuit
No external crystal required; internal clock configurable from 5MHz to 30MHz during ISP programming (equivalent to standard 8051 at 60–360MHz); internal high-precision R/C oscillator (±0.3%); ±1% temperature drift (−40°C to +85°C); ±0.6% temperature drift at room temperature (−20°C to +65°C)
Power-down wake-up sources: INT0/INT1 (rising/falling edge), INT2/INT3/INT4 (falling edge); pins CCP0/CCP1/RxD/RxD2/RxD3/RxD4/T0/T1/T2/T3/T4; dedicated internal power-down wake-up timer
16/32/40/48/56/58K/61K/63.5K bytes on-chip Flash program memory; endurance ≥100,000 erase/write cycles
Large on-chip EEPROM; endurance ≥100,000 erase/write cycles
ISP/IAP in-system programmable/in-application programmable; no programmer or emulator required
High-speed ADC: 8-channel, 10-bit, up to 300,000 samples/sec; 8-channel PWM also usable as 8-channel DAC
Comparator: usable as 1-channel ADC and for power-down detection; supports comparison between external pin CMP+ and external pin CMP−; interrupt generation supported; output on pin CMPO with configurable polarity; also supports comparison between external pin CMP+ and internal reference voltage
6-channel 15-bit dedicated high-precision PWM (with dead-band control) + 2-channel CCP (high-speed pulse output enables 2-channel 11–16-bit PWM) — usable as 8-channel DAC, 2× 16-bit timers, or 2 external interrupts (rising/falling edge)
7 timers/counters total: five 16-bit auto-reload timers/counters (T0/T1/T2/T3/T4; T0 and T1 compatible with standard 8051 timers/counters), all capable of clock output; pin SysClkO provides divided system clock output (÷1, ÷2, ÷4, or ÷16); 2-channel CCP implements 2 additional timers
Programmable clock output (divided from internal system clock or external clock input): T0 on P3.5; T1 on P3.4; T2 on P3.0; T3 on P0.4; T4 on P0.6; all five timer/counter clock outputs support 1–65536 division ratios; system clock output on P5.4/SysClkO (STC15 series 8-pin MCUs output master clock on P3.4/MCLKO)
Ultra-high-speed quad UART: four fully independent high-speed asynchronous serial ports; time-division multiplexing supports up to 9 virtual serial ports
SPI high-speed synchronous serial interface
Hardware watchdog timer (WDT)
Advanced instruction set architecture, compatible with standard 8051 instruction set; hardware multiply/divide instructions
General-purpose I/O (62/46/42/38/30/26 pins); after reset defaults to quasi-bidirectional/weak pull-up (standard 8051 I/O mode); four configurable modes: quasi-bidirectional/weak pull-up, push-pull/strong pull-up, input-only/high-impedance, open-drain; each I/O pin sink/source capability up to 20mA; total chip current not to exceed 120mA
No external crystal or external reset required; capable of outputting clock signal and active-low reset signal
Large on-chip 4096-byte SRAM
Unbreakable encryption; 9th-generation Macrocrystal encryption technology
Superior noise immunity: high ESD protection, passes 20kV ESD system-level test; passes 4kV EFT test; wide voltage range tolerates power supply fluctuations; wide temperature range −40°C to +85°C
Significantly reduced EMI; internally configurable clock; 1 clock/machine cycle; supports low-frequency clock operation
Ultra-low power consumption: power-down mode current <0.4μA (external interrupt wake-up); idle mode typical current <1mA; normal operating mode 4mA–6mA; power-down mode supports wake-up via external interrupt or dedicated internal power-down wake-up timer; suitable for battery-powered systems
In-system emulation and in-system programming; no dedicated programmer or emulator required; supports remote firmware upgrade

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Qty	Unit Price(Reference Only)	Total Amount
1+	$ 1.4403	$ 1.44
10+	$ 1.2167	$ 12.17
26+	$ 1.0936	$ 28.43
104+	$ 0.9543	$ 99.25
494+	$ 0.8911	$ 440.20
988+	$ 0.8636	$ 853.24
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Products Specifications

All

Type	Description
Category	Integrated Circuits (ICs)/Embedded/Microcontrollers
Manufacturer	STC Micro
Packaging	SOP-28-300mil
ADC (Bit)	10bit
Number of I/O	23
Program Memory Type	FLASH
Voltage - Supply	3.5V~5.5V
Program Storage Size	12KB
CPU Core	51 Series
CPU Maximum Speed	35MHz

Help & FeedbackShow similar products (0) >

Features

AI Translation

Large on-chip 4096-byte RAM data memory; high-speed: 1 clock/machine cycle; enhanced 8051 core, 7–12× faster than standard 8051, also 20% faster than STC's early 1T series MCUs (e.g., STC12/11/10 series)
Wide operating voltage: 2.5V–5.5V
Low-power design: slow-speed mode, idle mode, power-down mode (wake-up via external interrupt or internal power-down wake-up timer)
No external reset required; 16 selectable reset threshold voltages during ISP programming; built-in high-reliability reset circuit
No external crystal required; internal clock configurable from 5MHz to 30MHz during ISP programming (equivalent to standard 8051 at 60–360MHz); internal high-precision R/C oscillator (±0.3%); ±1% temperature drift (−40°C to +85°C); ±0.6% temperature drift at room temperature (−20°C to +65°C)
Power-down wake-up sources: INT0/INT1 (rising/falling edge), INT2/INT3/INT4 (falling edge); pins CCP0/CCP1/RxD/RxD2/RxD3/RxD4/T0/T1/T2/T3/T4; dedicated internal power-down wake-up timer
16/32/40/48/56/58K/61K/63.5K bytes on-chip Flash program memory; endurance ≥100,000 erase/write cycles
Large on-chip EEPROM; endurance ≥100,000 erase/write cycles
ISP/IAP in-system programmable/in-application programmable; no programmer or emulator required
High-speed ADC: 8-channel, 10-bit, up to 300,000 samples/sec; 8-channel PWM also usable as 8-channel DAC
Comparator: usable as 1-channel ADC and for power-down detection; supports comparison between external pin CMP+ and external pin CMP−; interrupt generation supported; output on pin CMPO with configurable polarity; also supports comparison between external pin CMP+ and internal reference voltage
6-channel 15-bit dedicated high-precision PWM (with dead-band control) + 2-channel CCP (high-speed pulse output enables 2-channel 11–16-bit PWM) — usable as 8-channel DAC, 2× 16-bit timers, or 2 external interrupts (rising/falling edge)
7 timers/counters total: five 16-bit auto-reload timers/counters (T0/T1/T2/T3/T4; T0 and T1 compatible with standard 8051 timers/counters), all capable of clock output; pin SysClkO provides divided system clock output (÷1, ÷2, ÷4, or ÷16); 2-channel CCP implements 2 additional timers
Programmable clock output (divided from internal system clock or external clock input): T0 on P3.5; T1 on P3.4; T2 on P3.0; T3 on P0.4; T4 on P0.6; all five timer/counter clock outputs support 1–65536 division ratios; system clock output on P5.4/SysClkO (STC15 series 8-pin MCUs output master clock on P3.4/MCLKO)
Ultra-high-speed quad UART: four fully independent high-speed asynchronous serial ports; time-division multiplexing supports up to 9 virtual serial ports
SPI high-speed synchronous serial interface
Hardware watchdog timer (WDT)
Advanced instruction set architecture, compatible with standard 8051 instruction set; hardware multiply/divide instructions
General-purpose I/O (62/46/42/38/30/26 pins); after reset defaults to quasi-bidirectional/weak pull-up (standard 8051 I/O mode); four configurable modes: quasi-bidirectional/weak pull-up, push-pull/strong pull-up, input-only/high-impedance, open-drain; each I/O pin sink/source capability up to 20mA; total chip current not to exceed 120mA
No external crystal or external reset required; capable of outputting clock signal and active-low reset signal
Large on-chip 4096-byte SRAM
Unbreakable encryption; 9th-generation Macrocrystal encryption technology
Superior noise immunity: high ESD protection, passes 20kV ESD system-level test; passes 4kV EFT test; wide voltage range tolerates power supply fluctuations; wide temperature range −40°C to +85°C
Significantly reduced EMI; internally configurable clock; 1 clock/machine cycle; supports low-frequency clock operation
Ultra-low power consumption: power-down mode current <0.4μA (external interrupt wake-up); idle mode typical current <1mA; normal operating mode 4mA–6mA; power-down mode supports wake-up via external interrupt or dedicated internal power-down wake-up timer; suitable for battery-powered systems
In-system emulation and in-system programming; no dedicated programmer or emulator required; supports remote firmware upgrade

C74822 EasyEDA Library

This image shows the pinout diagram of STC12C5612AD-35I-SOP28

This image shows the footprint diagram of STC12C5612AD-35I-SOP28

Compliance & Export Codes

Type	Details
ECCN
CNHTS	8542319090
USHTS
TARIC
CAHTS
BRHTS
INHTS
MXHTS

Type	Details
ECCN
CNHTS	8542319090
USHTS
TARIC

Type	Details
CAHTS
BRHTS
INHTS
MXHTS

Alternative Parts

	MPN	Manufacturer	Alternative Type	Packaging	Availability	Unit Price
	STC12C5616AD-35I-SOP28	STC Micro	Similar	SOIC-28-300mil	225	$ 1.2963
	STC12C5410AD-35I-SOP28	STC Micro	Similar	SOIC-28-300mil	0	$ 2.513

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