Infineon CY9AFB42NABGL-GK9E1

The CY9AB40NB Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with low-power consumption mode and competitive cost. These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and have peripheral functions such as various timers, ADCs, LCDC and Communication Interfaces (USB, UART, CSIO, I²C).

• Processor version: r2p1
• Up to 40 MHz Frequency Operation
• Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels
• 24-bit System timer (Sys Tick): System timer for OS task management
• Dual operation Flash memory
• Dual Operation Flash memory has the upper bank and the lower bank. So, this series could implement erase, write and read operations for each bank simultaneously.
• Main area: Up to 256 Kbytes (Up to 240 Kbytes upper bank + 16 Kbytes lower bank)
• Work area: 32 Kbytes (lower bank)
• Read cycle: 0 wait-cycle
• Security function for code protection
• This Series on-chip SRAM is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus.
• SRAM0: Up to 16 Kbytes
• SRAM1: Up to 16 Kbytes
• Supports SRAM, NOR Flash memory device
• Up to 8 chip selects
• 8-/16-bit Data width
• Up to 25-bit Address bit
• Maximum area size : Up to 256 Mbytes
• Supports Address/Data multiplex
• Supports external RDY function
• The USB interface is composed of Device and Host. PLL for USB is built-in, USB clock can be generated by multiplication of Main clock.
• USB2.0 Full-Speed supported
• Max 6 EndPoint supported
• EndPoint 0 is control transfer
• EndPoint 1, 2 can select Bulk-transfer, Interrupt-transfer or Isochronous-transfer
• EndPoint 3 to 5 can select Bulk-transfer or Interrupt-transfer
• EndPoint 1 to 5 is comprised of Double Buffers.
• The size of each endpoint is according to the follows. Endpoint 0, 2 to 5: 64 bytes Endpoint 1: 256 bytes
• USB2.0 Full/Low-speed supported
• Bulk-transfer, interrupt-transfer and Isochronous-transfer support
• USB Device connected/disconnected automatic detection
• Automatic processing of the IN/OUT token handshake packet
• Max 256-byte packet-length supported
• Wake-up function supported
• Up to 40 SEG×8 COM
• 8 COM or 4 COM mode can be selected.
• Built-in internal dividing resistor
• LCD drive power supply (bias) pin (VV4 to VV0)
• With blinking function
• 4 channels with 16steps ×9.-bit FIFO (ch.4 to ch.7), 4 channels without FIFO (ch.0 to ch.3)
• Operation mode is selectable from the following for each channel.
• UART
• CSIO
• I²C
• Full-duplex double buffer
• Selection with or without parity supported
• Built-in dedicated baud rate generator
• External clock available as a serial clock
• Hardware Flow control: Automatically control the transmission by CTS/RTS (only ch.4)
• Various error detection functions available (parity errors, framing errors, and overrun errors)
• Full-duplex double buffer
• Built-in dedicated baud rate generator
• Overrun error detection function available
• Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps) supported
• The DMA Controller has an independent bus from the CPU, so CPU and DMA Controller can process simultaneously.
• 8 independently configured and operated channels
• Transfer can be started by software or request from the built-in peripherals
• Transfer address area: 32-bit (4 Gbytes)
• Transfer mode: Block transfer/Burst transfer/Demand transfer
• Transfer data type: byte/half-word/word
• Transfer block count: 1 to 16
• Number of transfers: 1 to 65536
• Successive Approximation type
• Built-in 2 units
• Conversion time: 2.0 μs @ 2.7 V to 3.6 V
• Priority conversion available (priority at 2 levels)
• Scanning conversion mode
• Built-in FIFO for conversion data storage (for SCAN conversion: 16 steps, for Priority conversion: 4 steps)
• Operation mode is selectable from the following for each channel.
• 16-bit PWM timer
• 16-bit PPG timer
• 16-/32-bit reload timer
• 16-/32-bit PWC timer
• This series can use its pins as general-purpose I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated to.
• Capable of pull-up control per pin
• Capable of reading pin level directly
• Built-in the port relocate function
• Up to 83 fast general-purpose I/O Ports@100 pin Package
• Some ports are 5 V tolerant.