ST STM32H563ZIT6
| Manufacturer | |
| MPN | STM32H563ZIT6 |
| LCSC Part # | C6807803 |
| Packaging | LQFP-144(20x20) |
| Customer # | |
| Key Attributes | Arm Cortex-M33 32-bit MCU+TrusZone + FPU |
| Datasheet | ST STM32H563ZIT6 |
| RoHS Compliance | 3 documents available |
| Alternative Parts | 1 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-144(20x20) | |
| Number of I/O | 110 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 1.71V~3.6V | |
| EEPROM | - | |
| Program Storage Size | 2MB | |
| CPU Core | ARM Cortex-M33 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 250MHz | |
| Oscillator Type | Built-in+External |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-144(20x20) | |
| Number of I/O | 110 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 1.71V~3.6V |
| Type | Description | |
|---|---|---|
| EEPROM | - | |
| Program Storage Size | 2MB | |
| CPU Core | ARM Cortex-M33 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 250MHz | |
| Oscillator Type | Built-in+External |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- Includes ST state-of-the-art patented technology
- Arm Cortex-M33 CPU with TrustZone, FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1)
- 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories
- 4-Kbyte data cache for external memories
- 1.5 DMIPS/MHz (Drystone 2.1)
- 1023 CoreMark (4.092 CoreMark/MHz)
- Up to 2 Mbytes of embedded flash memory with ECC, 2 banks read-while-write
- Up to 48-Kbyte per bank with high-cycling capability (100 K cycles) for DATA flash
- 2-Kbyte OTP (one-time programmable)
- 640 Kbytes of SRAM (64-Kbyte SRAM2 with ECC and 320-Kbyte SRAM3 with flexible ECC)
- 4 Kbytes of backup SRAM available in the lowest power modes
- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- One Octo-SPI memory interface with support for serial PSRAM/NAND/NOR, Hyper RAM/flash frame formats
- Two SD/SDIO/MMC interfaces
- Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
- External oscillators: 4 - 50 MHz HSE, 32.768 kHz LSE
- Up to 139 fast I/Os with interrupt capability (most 5 V tolerant)
- Up to 10 I/Os with independent supply down to 1.08 V
- Sleep, Stop and Standby modes
- V_BAT supply for RTC, 32 x 32-bit backup registers
- Arm TrustZone with Armv8-M mainline security extension
- Up to eight configurable SAU regions
- TrustZone aware and securable peripherals
- Flexible life-cycle scheme with secure debug authentication
- SFI (secure firmware installation)
- Secure firmware upgrade support with TF-M
- HASH hardware accelerator
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- Active tampers
- Two DMA controllers to offload the CPU
- Two dual-port DMAs with FIFO
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
- 1.71 V to 3.6 V application supply and I/O
- POR, PDR, PVD and BOR
- Embedded regulator (LDO) or SMPS stepdown converter regulator with configurable scalable output to supply the digital circuitry
- Up to 24 timers: 18x 16-bit (including x6 low-power 16-bit timer available in Stop mode), Two 32-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, Two watchdogs, Two SysTick timer
- Up to 34 x communication interfaces: Up to four I2C FM+ interfaces (SMBus/PMBus), One I3C interface, Up to 12 U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) and 1x LP UART, Up to six SPIs including three muxed with full-duplex I2S for audio class accuracy via internal audio PLL or external clock and up to five additional SPI from five USART when configured in Synchronous mode (one additional SPI with OctoSPI), Two SAI, Two FD-CAN, One 8- to 14- bit camera interface, One 16-bit parallel slave synchronous interface, One HDMI-CEC, One Ethernet MAC interface with DMA controller, One USB 2.0 full-speed host and device, One USB Type-C / USB power-delivery r3.1
- Two 12-bit ADC with up to 5 MSPS in 12-bit
- Two 12-bit D/A converters
- Digital temperature sensor
- Authenticated debug and flexible device life cycle
- Serial wire-debug (SWD), JTAG, Embedded Trace Microcell (ETM)
- ECOPACK2 compliant packages
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-144(20x20) | |
| Number of I/O | 110 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 1.71V~3.6V | |
| EEPROM | - | |
| Program Storage Size | 2MB | |
| CPU Core | ARM Cortex-M33 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 250MHz | |
| Oscillator Type | Built-in+External |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | ST | |
| Packaging | LQFP-144(20x20) | |
| Number of I/O | 110 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 1.71V~3.6V |
| Type | Description | |
|---|---|---|
| EEPROM | - | |
| Program Storage Size | 2MB | |
| CPU Core | ARM Cortex-M33 | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 250MHz | |
| Oscillator Type | Built-in+External |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- Includes ST state-of-the-art patented technology
- Arm Cortex-M33 CPU with TrustZone, FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1)
- 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories
- 4-Kbyte data cache for external memories
- 1.5 DMIPS/MHz (Drystone 2.1)
- 1023 CoreMark (4.092 CoreMark/MHz)
- Up to 2 Mbytes of embedded flash memory with ECC, 2 banks read-while-write
- Up to 48-Kbyte per bank with high-cycling capability (100 K cycles) for DATA flash
- 2-Kbyte OTP (one-time programmable)
- 640 Kbytes of SRAM (64-Kbyte SRAM2 with ECC and 320-Kbyte SRAM3 with flexible ECC)
- 4 Kbytes of backup SRAM available in the lowest power modes
- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- One Octo-SPI memory interface with support for serial PSRAM/NAND/NOR, Hyper RAM/flash frame formats
- Two SD/SDIO/MMC interfaces
- Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
- External oscillators: 4 - 50 MHz HSE, 32.768 kHz LSE
- Up to 139 fast I/Os with interrupt capability (most 5 V tolerant)
- Up to 10 I/Os with independent supply down to 1.08 V
- Sleep, Stop and Standby modes
- V_BAT supply for RTC, 32 x 32-bit backup registers
- Arm TrustZone with Armv8-M mainline security extension
- Up to eight configurable SAU regions
- TrustZone aware and securable peripherals
- Flexible life-cycle scheme with secure debug authentication
- SFI (secure firmware installation)
- Secure firmware upgrade support with TF-M
- HASH hardware accelerator
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- Active tampers
- Two DMA controllers to offload the CPU
- Two dual-port DMAs with FIFO
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
- 1.71 V to 3.6 V application supply and I/O
- POR, PDR, PVD and BOR
- Embedded regulator (LDO) or SMPS stepdown converter regulator with configurable scalable output to supply the digital circuitry
- Up to 24 timers: 18x 16-bit (including x6 low-power 16-bit timer available in Stop mode), Two 32-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, Two watchdogs, Two SysTick timer
- Up to 34 x communication interfaces: Up to four I2C FM+ interfaces (SMBus/PMBus), One I3C interface, Up to 12 U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) and 1x LP UART, Up to six SPIs including three muxed with full-duplex I2S for audio class accuracy via internal audio PLL or external clock and up to five additional SPI from five USART when configured in Synchronous mode (one additional SPI with OctoSPI), Two SAI, Two FD-CAN, One 8- to 14- bit camera interface, One 16-bit parallel slave synchronous interface, One HDMI-CEC, One Ethernet MAC interface with DMA controller, One USB 2.0 full-speed host and device, One USB Type-C / USB power-delivery r3.1
- Two 12-bit ADC with up to 5 MSPS in 12-bit
- Two 12-bit D/A converters
- Digital temperature sensor
- Authenticated debug and flexible device life cycle
- Serial wire-debug (SWD), JTAG, Embedded Trace Microcell (ETM)
- ECOPACK2 compliant packages
C6807803 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |



