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ADI LTC2141CUP-14#PBF product image
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ADI LTC2141CUP-14#PBF

Manufacturer
MPN
LTC2141CUP-14#PBF
LCSC Part #
C679337
Packaging
QFN-64-EP(9x9)
Customer #
Key Attributes
SPI 1.7V~1.9V QFN-64-EP(9x9) Analog to Digital Converters (ADC) RoHS
DatasheetADI LTC2141CUP-14#PBF
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QtyUnit Price(Reference Only)Total Amount
1+$ 44.4335$ 44.43
200+$ 17.1958$ 3439.16
500+$ 16.5908$ 8295.40
1,000+$ 16.2929$ 16292.90
Standard Packaging40/Full Tube
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC)
ManufacturerADI
PackagingQFN-64-EP(9x9)
Operating Temperature0℃~+70℃
FeaturesProgrammable gain;Built-in reference source;Differential output
InterfaceSPI
Resolution(Bits)14;40MHz
Quiescent Current (Iq)-
Voltage - Supply1.7V~1.9V
DNL (LSB)0.3LSB
Number of Channels2
ADC architecture-
Integral non - linearity1LSB

Introduction

AI Translation

The LTC2142- 14/LTC2141- 14/LTC2140- 14 are 2- channel simultaneous sampling 14- bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.2dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.08psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ± 1 LSB INL (typ), ± 0.3 LSB DNL (typ) and no missing codes over temperature. The transition noise is 1.2LSBRMS. The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC- inputs may be driven differentially or single- ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.

Features

AI Translation
  • Two- Channel Simultaneously Sampling ADC
  • 73.2dB SNR
  • 90dB SFDR
  • Low Power: 95mW/67mW/50mW Total 48mW/34mW/25mW per Channel
  • Single 1.8V Supply
  • CMOS, DDR CMOS, or DDR LVDS Outputs
  • Selectable Input Ranges: 1Vp - p to 2Vp - p
  • 750MHz Full Power Bandwidth S/H
  • Optional Data Output Randomizer
  • Optional Clock Duty Cycle Stabilizer
  • Shutdown and Nap Modes
  • Serial SPI Port for Configuration
  • 64- Pin (9mm × 9mm) GPN Package

Applications

AI Translation
  • Communications
  • Cellular Base Stations
  • Software Defined Radios
  • Portable Medical Imaging
  • Multi- Channel Data Acquisition
  • Nondestructive Testing