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micron MT29F2G16ABAEAWP-AIT:E TR product image
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micron MT29F2G16ABAEAWP-AIT:E TR

Manufacturer
MPN
MT29F2G16ABAEAWP-AIT:E TR
LCSC Part #
C6685614
Packaging
TFSOP-48-18.4mm
Customer #
Key Attributes
2Gbit 2.7V~3.6V Parallel TFSOP-48-18.4mm Memory RoHS
Datasheetmicron MT29F2G16ABAEAWP-AIT:E TR
In-Stock: 5
5 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
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QtyUnit PriceTotal Amount
1+$ 8.7627$ 8.76
10+$ 8.5676$ 85.68
30+$ 8.4364$ 253.09
100+$ 8.3068$ 830.68
Standard Packaging1000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
Manufacturermicron
PackagingTFSOP-48-18.4mm
Operating Temperature-40℃~+85℃
FeaturesRead buffer function;Copy back write function;Hardware reset function;Hardware write protection function;ECC error correction function;OTP region write protection and lock function
Memory Size2Gbit
Voltage - Supply2.7V~3.6V
Program / Erase Cycles100,000 cycles
Clock Frequency-
Data Retention - TDR (Year)10 years
Block Erase Time(tBE)700us
Page Programming Time (Tpp)200us
Write Cycle Time(tWC)20ns
Standby Supply Current-
InterfaceParallel

Features

AI Translation
  • Compliant with Open NAND Flash Interface 1.0 specification
  • Single-level cell technology
  • Organization
  • Page size (x8): 2112 bytes (2048 + 64 bytes)
  • Page size (x16): 1056 words (1024 + 32 words)
  • Block size: 64 pages (128K + 4K bytes)
  • Plane size: 2 planes, 1024 blocks per plane
  • Device density: 2Gb: 2048 blocks
  • Asynchronous I/O performance
  • tRC/tWC: 20ns (3.3V), 25ns (1.8V)
  • Array performance
  • Page read: 25μs
  • Page program: 200μs (typical: 1.8V, 3.3V)
  • Block erase: 700μs (typical)
  • Command set: ONFI NAND flash protocol
  • Advanced command set
  • Page program cache mode
  • Page read cache mode
  • One-time programmable mode
  • Dual-plane commands
  • Interleaved die operations
  • Read ID
  • Block locking (1.8V only)
  • Internal data move
  • Status byte provides software method for detecting:
  • Operation complete
  • Pass/fail status
  • Write-protect status
  • Ready/busy signal provides hardware method for detecting operation completion
  • WP# signal: write-protects entire device
  • First block (block address 00h) at factory shipment with ECC is in valid state. Refer to the Error Management section for minimum ECC requirements.
  • Block 0 requires 1-bit ECC if program/erase cycles are fewer than 1000
  • Reset command required as first command after power-up
  • Alternative method for device initialization after power-up (contact factory)
  • Supports internal data move operations within the plane being read
  • Quality and reliability
  • Data retention: 10 years
  • Endurance: 100,000 program/erase cycles
  • Operating voltage range
  • VCC: 2.7 - 3.6V
  • VCC: 1.7 - 1.95V
  • Operating temperature
  • Automotive grade: -40℃ to +85℃
  • Automotive grade: -40℃ to +105℃
  • Package
  • 48-pin TSOP type 1, CPL
  • 63-ball VFBGA