TI SN74ALS374ANS
| Manufacturer | |
| MPN | SN74ALS374ANS |
| LCSC Part # | C6489137 |
| Packaging | - |
| Customer # | |
| Key Attributes | 4.75V~5.25V 8 1 28ns Flip Flops |
| Datasheet | TI SN74ALS374ANS |
| Alternative Parts | 1 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | - | |
| Voltage - Supply | 4.75V~5.25V | |
| Number of Bits per Element | 8 | |
| Output Type | Tri-State | |
| Operating Temperature | 0℃~+70℃ | |
| Series | 74LS Series | |
| Synchronous/Asynchronous | - | |
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 20ns | |
| Hold Time | - | |
| Propagation Delay | 28ns | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | - | |
| Voltage - Supply | 4.75V~5.25V | |
| Number of Bits per Element | 8 | |
| Output Type | Tri-State | |
| Operating Temperature | 0℃~+70℃ | |
| Series | 74LS Series | |
| Synchronous/Asynchronous | - |
| Type | Description | |
|---|---|---|
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 20ns | |
| Hold Time | - | |
| Propagation Delay | 28ns | |
| Trigger Type | Rising Edge |
Introduction
374 is a high-speed, low-power octal D-type flip-flop with individual D-type inputs for each flip-flop and three-state outputs, designed for bus-oriented applications. All flip-flops share a common buffered clock (CP) and output enable (OE). The '374 is fabricated using advanced low-power Schottky process and is compatible with all Fairchild TTL families. The '374 consists of 8 edge-triggered flip-flops with individual D-type inputs and three-state true outputs, with all flip-flops sharing a common buffered clock and buffered output enable (OE). The 8 flip-flops store the states of their respective D inputs that meet the setup time and hold time requirements at the low-to-high transition of the clock (CP). When the output enable (OE) is LOW, the contents of the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs enter a high-impedance state. Operation of the OE input does not affect the state of the flip-flops.
Features
- Edge-triggered D-type inputs
- Buffered positive edge-triggered clock
- 3-state outputs for bus applications
Applications
- Bus applications
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | - | |
| Voltage - Supply | 4.75V~5.25V | |
| Number of Bits per Element | 8 | |
| Output Type | Tri-State | |
| Operating Temperature | 0℃~+70℃ | |
| Series | 74LS Series | |
| Synchronous/Asynchronous | - | |
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 20ns | |
| Hold Time | - | |
| Propagation Delay | 28ns | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | - | |
| Voltage - Supply | 4.75V~5.25V | |
| Number of Bits per Element | 8 | |
| Output Type | Tri-State | |
| Operating Temperature | 0℃~+70℃ | |
| Series | 74LS Series | |
| Synchronous/Asynchronous | - |
| Type | Description | |
|---|---|---|
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 20ns | |
| Hold Time | - | |
| Propagation Delay | 28ns | |
| Trigger Type | Rising Edge |
Introduction
374 is a high-speed, low-power octal D-type flip-flop with individual D-type inputs for each flip-flop and three-state outputs, designed for bus-oriented applications. All flip-flops share a common buffered clock (CP) and output enable (OE). The '374 is fabricated using advanced low-power Schottky process and is compatible with all Fairchild TTL families. The '374 consists of 8 edge-triggered flip-flops with individual D-type inputs and three-state true outputs, with all flip-flops sharing a common buffered clock and buffered output enable (OE). The 8 flip-flops store the states of their respective D inputs that meet the setup time and hold time requirements at the low-to-high transition of the clock (CP). When the output enable (OE) is LOW, the contents of the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs enter a high-impedance state. Operation of the OE input does not affect the state of the flip-flops.
Features
- Edge-triggered D-type inputs
- Buffered positive edge-triggered clock
- 3-state outputs for bus applications
Applications
- Bus applications
C6489137 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |