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Modelos EDAEasyEDA
GSI Technology GS81302DT20GE-500I
| Fabricante | GSI TechnologyAsian Brands |
| N.º de pieza fab. | GS81302DT20GE-500I |
| Nº LCSC | C5755775 |
| Emb. | FPBGA-165(15x17) |
| Número de Cliente | |
| Atrib. clave | 144Mbit FPBGA-165(15x17) Memory RoHS |
| Hoja de Datos | GSI Technology GS81302DT20GE-500I |
Especificaciones del Producto
Todo
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Memory/Memory | |
| Fabricante | GSI Technology | |
| Emb. | FPBGA-165(15x17) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function | |
| Memory Size | 144Mbit | |
| Voltage - Supply | 1.7V~1.9V;- | |
| Access Time | - | |
| Standby Supply Current | - | |
| Interface | - |
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Memory/Memory | |
| Fabricante | GSI Technology | |
| Emb. | FPBGA-165(15x17) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function |
| Tipo | Descripción | |
|---|---|---|
| Memory Size | 144Mbit | |
| Voltage - Supply | 1.7V~1.9V;- | |
| Access Time | - | |
| Standby Supply Current | - | |
| Interface | - |
Ayuda y comentariosMostrar productos similares (0) >
Descripción
Traducción por IA
This product is a separate input/output synchronous SRAM compliant with the SigmaQuad-II+ SRAM pin standard, with a density of 144Mb. It is a member of the low-power, low-voltage HSTL I/O SRAM family designed to meet the speed requirements of cost-effective, high-performance networking systems.
Características
Traducción por IA
- 2.5 clock cycle latency
- SigmaQuad interface supporting simultaneous read/write operations
- JEDEC-compliant pinout and packaging
- Double data rate interface
- Byte write control sampled at data input
- Burst read/write operation support (burst length 4)
- Dual-range on-chip termination for data, byte write, and clock inputs
- Core supply voltage: 1.8V ±100 mV
- 1.5V or 1.8V HSTL interface support
- Pipelined read operation
- Fully coherent read/write pipeline
- Programmable output drive strength via ZQ pin
- Data valid pin support
- IEEE 1149.1 JTAG boundary scan compliant
- 165-ball BGA package, 15mm × 17mm, 1mm ball pitch
- RoHS-compliant 165-ball BGA package available
Aplicaciones
Traducción por IA
- High-performance network systems
Agotado
Avisarme
Mínimo: 1Múltiplo: 1Unidad de venta: Piece
Añadir a la Lista BOM
| Cant. | Prec. unit.(Solo como referencia) | Importo total |
|---|---|---|
| 1+ | $ 591.7571 | $ 591.76 |
| 200+ | $ 236.1152 | $ 47223.04 |
| 500+ | $ 228.2251 | $ 114112.55 |
| 1,000+ | $ 224.3262 | $ 224326.20 |
Encapsulado Estándar10/Full Tray | ||
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Especificaciones del Producto
Todo
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Memory/Memory | |
| Fabricante | GSI Technology | |
| Emb. | FPBGA-165(15x17) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function | |
| Memory Size | 144Mbit | |
| Voltage - Supply | 1.7V~1.9V;- | |
| Access Time | - | |
| Standby Supply Current | - | |
| Interface | - |
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Memory/Memory | |
| Fabricante | GSI Technology | |
| Emb. | FPBGA-165(15x17) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function |
| Tipo | Descripción | |
|---|---|---|
| Memory Size | 144Mbit | |
| Voltage - Supply | 1.7V~1.9V;- | |
| Access Time | - | |
| Standby Supply Current | - | |
| Interface | - |
Ayuda y comentariosMostrar productos similares (0) >
Descripción
Traducción por IA
This product is a separate input/output synchronous SRAM compliant with the SigmaQuad-II+ SRAM pin standard, with a density of 144Mb. It is a member of the low-power, low-voltage HSTL I/O SRAM family designed to meet the speed requirements of cost-effective, high-performance networking systems.
Características
Traducción por IA
- 2.5 clock cycle latency
- SigmaQuad interface supporting simultaneous read/write operations
- JEDEC-compliant pinout and packaging
- Double data rate interface
- Byte write control sampled at data input
- Burst read/write operation support (burst length 4)
- Dual-range on-chip termination for data, byte write, and clock inputs
- Core supply voltage: 1.8V ±100 mV
- 1.5V or 1.8V HSTL interface support
- Pipelined read operation
- Fully coherent read/write pipeline
- Programmable output drive strength via ZQ pin
- Data valid pin support
- IEEE 1149.1 JTAG boundary scan compliant
- 165-ball BGA package, 15mm × 17mm, 1mm ball pitch
- RoHS-compliant 165-ball BGA package available
Aplicaciones
Traducción por IA
- High-performance network systems
Cumplimiento & Códigos de Exportación
| Tipo | Detalles |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B2B |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Tipo | Detalles |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B2B |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Tipo | Detalles |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |