Motorcomm YT9215RB

YT9215RB is a LQFP128 E-PAD, high-performance 5+2 -port Gigabit Ethernet switch. It integrates five PHY ports support 1000Base-T/100Base-TX/10Base-Te, and supports two extra MAC ports for specific applications which support MII/RMII/RGMII. YT9215RB is also embedded with a RSIC-V microprocessor. The integrated GIGA-PHY complies with 10BASE-Te, 100BASE-TX, and 1000BASE-T IEEE standard 802.3 and also support Motorcomm proprietary LRE100-4 feature, which makes the device can auto-negotiate and link up with LRE100-4 compliant link partners. LRE100-4 in extended cable length applications up to 400 meter at 100Mbps over CAT5E cable. The Extension GMAC1 and Extension GMAC2 of the YT9215RB support xMII for connecting with an external PHY, MAC, external CPU or RISC in specific applications. The xMII refer to Reduced Gigabit Media Independent Interface (RGMII), Media Independent Interface (MII), and Reduced Media Independent Interface (RMII). YT9215RB integrates a 4K look-up table with an efficient hashing algorithm for address searching and learning, each of the entries can be configured as a static entry. YT9215RB supports IEEE 802.1Q VLAN and has a 4K-entry VLAN table. It provides VLAN classification according to port-based, protocol-and-port-based, VLAN translation, Flow-based capability，and MAC-based, IP-subnet-based VLAN can be supported by configuration. It also supports IVL, SVL, and IVL/SVL for flexible network topology architecture. The YT9215RB supports standard 802.3x flow control frames for full duplex, and optional backpressure for half duplex. It determines when to invoke the flow control mechanism by checking the availability of system resources. The YT9215RB supports storm control. In order to support flexible traffic classification, the YT9215RB supports 384-hardware entry ACL rule check and multiple actions options. The 384 entries are composed of 48 rows, each row has 8 entries. To support long rule, rule extension is supported by any combinations of the 8 entries for each row. Each port can optionally enable or disable the ACL rule check function. The ACL rule key can be based on packet physical port, Layer2, Layer3, and Layer4 information. When an ACL rule matches, the action taken is configurable to Drop/Permit/Redirect/Mirror, change priority/DSCP value in 802.1q/Q tag, and rate policing.

• High performance, nonblocking, 7 port Ethernet Switch integrating
• Five 10/100/1000Mbps PHYs with Advanced Virtual Cable Tester (VCT) diagnostic features
• Each PHY supports 10/100/1000M full duplex connectivity (half duplex only supported in 10/100M mode)
• Full duplex operation with IEEE 802.3x flow control and half duplex operation with backpressure
• Interface
• Embedded 5-port 1000/100BaseT/ 10Base-Te PHY
• Embedded two RGMII/MII/RMII interface
• Advanced Features
• Supports parallel LED or serial LED outputs
• Supports SPI/MDIO/I2C Slave interface
• Supports MDIO/I2C Master interface
• Supports 1 interrupt output to external CPU for notification
• Supports 64K-byte EEPROM space for configuration
• Link On Cable Length Power Saving
• Link Down Power Saving
• Supports 9K byte jumbo frames
• Supports 2 IEEE 802.3ad Link aggregation port groups
• Security Filtering
• Disable learning for each port
• Disable learning-table aging for each port
• Unknown DA filter mask
• Supports Port Isolation
• Supports Broadcast/Multicast/Unknown DA storm control protects system from attack by hackers
• Supports DOS attack prevent
• Control, Management and Statistics
• Supports RFC MIB Counters
• MIB-II (RFC 1213)
• Ethernet-Like MIB (RFC 3635)
• Interface Group MIB (RFC 2863)
• RMON (RFC 2819)
• Bridge MIB (RFC 1493)
• Bridge MIB Extension (RFC 2674)
• Supports OAM and EEE LLDP (Energy Efficient Ethernet Link Layer Discovery Protocol)
• Supports Loop Detection
• Packet Process Engine
• Supports 802.1Q VLANs
• Supports 4K VLANs
• Supports untag definition in each VLAN
• Supports VLAN policing and VLAN forwarding decision
• Supports Port based, Tag based, and Protocol based VLAN
• Supports per port egress VLAN tagging and untagging
• Supports IEEE 802.1D/s/w Spanning Tree Protocols
• Support Multicast VLAN (MVR)
• Supports IVL, SVL, and IVL/SVL
• Supports IEEE 802.1ad Stacking VLAN
• Support VLAN translation (1:1/2:1/2:2/ N:1/1:N)
• Supports IEEE 802.1x Access Control Protocol
• Port-Based Access Control
• MAC-Based Access Control
• Guest VLAN
• Supports ACL Rules
• Supports Hardware/Software IGMP/ MLD Snooping
• Supports Fast Leave
• Support IGMPV1/V2/V3 Static/Dynamic Router port
• Mirror Port based mirror
• Flow based mirror
• Support reserved multicast control
• Support WOL
• Quality of Service (QoS)
• Supports Queue based DWRR/SP, packet/byte modes are both supported for DWRR
• Support min-max queue based shaping, packet/byte modes are both supported
• Support single token bucket for port based shaping, packet/byte modes are both supported
• Supports per port Input Bandwidth Control, packet/byte modes are both supported
• trTCM color aware/blind packet/byte modes
• Traffic classification based on multiple source type
• Support 8 unicast queues and 4 multicast queues for each port
• Tail drop is supported for UQ/MQ, WRED is supported for UQ
• Microprocessor
• Integrated RISC-V microprocessor
• Supports Flash Interface (Dual mode/Single mode)
• 25MHz crystal or 3.3V OSC input
• TQFP 128-pin E-PAD package

• 5-Port 1000Base-T + 2-Port RGMII
• 5-Port 1000Base-T Router with Single MII/RGMII
• 5-Port 1000Base-T Router with Dual MII/RGMII
• 5-Port 1000Base-T NVR
• 5-Port 1000Base-T ONU