ST STM32U375CGT6Q

The STM32U375xx devices belong to an ultra-low-power microcontroller family based on the high-performance Arm® Cortex®-M33 32-bit RISC core. The operating frequency can reach up to 96 MHz. The Cortex®-M33 core integrates a single-precision floating-point unit, supporting all Arm® single-precision data processing instructions and all data types. The core also implements a complete digital signal processing instruction set and a memory protection unit for enhanced application security. The STM32U3 series is the first STM32 family to adopt near-threshold voltage technology, designed to achieve a breakthrough improvement in battery life. Through near-threshold technology, STM32U3 devices reduce dynamic power consumption to 10μA/MHz, significantly extending battery life across a wide range of applications. These devices integrate high-speed memory.

• Incorporates ST's advanced proprietary technology
• Ultra-low power consumption
• 1.71 V to 3.6 V supply voltage
• -40°C to +105°C temperature range
• V_BAT mode: powers RTC and 32×32-bit backup registers
• 1.6 μA Stop 3 mode (with 8 KB SRAM)
• 2.2 μA Stop 3 mode (with full SRAM)
• 3.8 μA Stop 2 mode (with 8 KB SRAM)
• 4.5 μA Stop 2 mode (with full SRAM)
• 9.5 μA/MHz Run mode @ 3.3 V (While(1) SMPS buck converter mode)
• 13 μA/MHz Run mode @ 3.3 V/48 MHz (CoreMark® SMPS buck converter mode)
• 16 μA/MHz Run mode @ 3.3 V/96 MHz (CoreMark® SMPS buck converter mode)
• Brown-out reset in all modes except Shutdown mode
• Arm® 32-bit Cortex®-M33 CPU with TrustZone® and FPU
• ART Accelerator
• 8 KB instruction cache for zero-wait-state execution from Flash and external memory: up to 96 MHz, with MPU, 144 DMIPS, and DSP instructions
• Power management
• Embedded voltage regulator and SMPS buck converter with dynamic switching and voltage scaling support
• Benchmarks
• 1.5 DMIPS/MHz (Dhrystone 2.1)
• 387 CoreMark® (4.09 CoreMark®/MHz)
• 500 ULPMark™-CP
• 117 ULPMark™-CM
• 202000 SecureMark™-TLS
• Memory
• Up to 1 MB Flash with ECC, 2 banks supporting read-while-write operation
• 256 KB SRAM, including 64 KB with hardware parity
• OCTOSPI external memory interface supporting SRAM, PSRAM, NOR, NAND, and FRAM
• Security
• Arm® TrustZone® with configurable secure I/Os, memories, and peripherals
• Flexible lifecycle scheme with readout protection and password-protected debug
• Root of trust based on boot entry and secure hide protection area
• Secure firmware installation from embedded root secure services
• Secure firmware update
• Cortex®-M TF-M support
• Public key accelerator, ECDSA signature verification
• Key hardware protection
• Authenticated key
• HASH hardware accelerator
• True RNG compliant with NIST SP800-90B
• 96-bit UID
• 512-byte OTP memory
• Tamper protection
• Clock management
• 4 to 50 MHz crystal oscillator
• 32.768 kHz crystal oscillator for RTC
• Internal 16 MHz factory-trimmed RC oscillator (±1%)
• Internal low-power RC oscillator at 32 kHz or 250 Hz (±5%)
• 2 internal multi-speed oscillators, 3 MHz to 96 MHz
• Internal 48 MHz oscillator with clock recovery
• Precision multi-speed internal oscillator up to 96 MHz in PLL mode, supporting 32.768 kHz, 16 MHz, or 32 MHz crystal oscillators
• General-purpose I/Os
• Up to 82 fast I/Os with interrupt capability, most 5V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
• Up to 15 timers and 2 watchdogs
• 1× 16-bit advanced motor control timer, 3× 32-bit and 3× 16-bit general-purpose timers, 2× 16-bit basic timers, 4× low-power 16-bit timers (available in Stop mode), 2× watchdog, 2× SysTick timer
• RTC with hardware calendar, alarms, and calibration
• Up to 19 communication peripherals
• 1× USB 2.0 full-speed controller
• 1× serial audio interface
• 3× I2C FM+ interfaces (1 Mbit/s) with SMBus/PMBus™ support
• 2× I3C interfaces (single data rate) with I2C FM+ mode support
• 2× USART and 2× UART (SPI, ISO 7816, LIN, IrDA, modem support), 1× LPUART
• 3× SPI interfaces (including 1× SPI with OCTOSPI and 2× SPI with USART, 6 SPIs total)
• 1× CAN FD controller
• 1× SDMMC interface
• 1× audio digital filter with sound activity detection
• 12-channel general-purpose DMA controller, operational in Sleep and Stop modes (up to Stop 2)
• Up to 21 capacitive sensing channels
• Touch key, linear, and rotary touch sensor support
• Rich analog peripherals (independently supplied)
• 2× 12-bit ADC, 2.5 Msps, with hardware oversampling
• 12-bit DAC with 2× D/A converters, low-power sample-and-hold, autonomous operation in Stop 1 mode
• 2× op-amps with built-in programmable gain amplifiers
• 2× ultra-low-power comparators
• CRC calculation unit
• Debug
• Development support: SWD, JTAG, embedded trace macrocell
• All packages ECOPACK2 compliant