RENESAS R5F11BLCGFB#50

True Low Power Platform (as low as 66 μA/MHz , and 0.57 μA for RTC+LVD), 1.6 V to 5.5 V operation, 32/64 Kbyte Flash, Max.32 MHz CPU operation, Enhanced analog functions, for General Purpose Applications

• VDD = single power supply voltage of 1.6 to 5.5 V which can operate a 1.8 V device at a low voltage
• HALT mode
• STOP mode
• SNOOZE mode
• CISC architecture with 3 - stage pipeline
• Minimum instruction execution time: Can be changed from high speed (0.03125 μs : @ 32 MHz operation with high - speed on - chip oscillator) to ultra - low speed (30.5 μs : @32.768 kHz operation with subsystem clock)
• Multiply/divide/multiply & accumulate instructions are supported.
• Address space: 1 MB
• General - purpose registers: (8 - bit register × 8)×4 banks
• On - chip RAM: 5.5 KB
• Code flash memory: 32/64 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security function)
• On - chip debug function
• Self - programming (with boot swap function/flash shield window function)
• Data flash memory: 4 KB
• Back ground operation (BGO): Instructions can be executed from the program memory while rewriting the data flash memory.
• Number of rewrites: 1,000,000 times (TYP.)
• Voltage of rewrites: VDD = 1.8 to 5.5 V
• Select from 64 MHz, 48 MHz, 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz
• High accuracy: ±1.0% (VDD = 1.8 to 5.5 V, TA = - 20 to + 85℃)
• Operating ambient temperature: TA = - 40 to + 85℃ (A: Consumer applications); TA = - 40 to + 105℃ (G: Industrial applications)
• On - chip power - on - reset (POR) circuit
• On - chip voltage detector (LVD) (Select interrupt and reset from 14 levels)
• Transfer modes: Normal transfer mode, repeat transfer mode, block transfer mode
• Activation sources: Activated by interrupt sources.
• Chain transfer function
• Event signals of 22 types can be linked to the specified peripheral function.
• Simplified SPI (CSI): 3 to 6 channels
• UART/UART (LIN - bus supported): 3 channels
• I2C/simplified I2C: 3 to 6 channels
• IrDA: 1 channel
• 16 - bit timer: 9 channels (Timer Array Unit (TAU): 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels (with PWMOPA), Timer RG: 1 channel, Timer RX: 1 channel)
• 12 - bit interval timer: 1 channel
• Real - time clock: 1 channel (calendar for 99 years, alarm function, and clock correction function)
• Watchdog timer: 1 channel (operable with the dedicated low - speed on - chip oscillator)
• 8/10 - bit resolution A/D converter (VDD = 1.6 to 5.5 V)
• Analog input: 8 to 17 channels
• Internal reference voltage (1.45 V) and temperature sensor
• 8 - bit resolution D/A converter (VDD = 1.6 to 5.5 V)
• Analog output: 1 or 2 channels
• Output voltage: 0 V to VDD
• Real - time output function
• 2 channels (pin selector is provided for 1 channel)
• Incorporates a function for the output of a timer window in combination with the timer array unit.
• The external reference voltage or internal reference voltage can be selected as the reference voltage.
• 1 channel
• I/O port: 20 to 58 (N - ch open drain I/O [withstand voltage of 6 V]: 2 to 4, N - ch open drain I/O [VDD withstand voltage/EVDD withstand voltage]: 10 to 16)
• Can be set to N - ch open drain, TTL input buffer, and on - chip pull - up resistor
• Different potential interface: Can connect to a 1.8/2.5/3 V device
• On - chip key interrupt function
• On - chip clock output/buzzer output controller
• On - chip BCD (binary - coded decimal) correction circuit