TI F28M36H33B2ZWTT

Concerto series is a multi-core system-on-chip microcontroller unit (MCU) with independent communication and real-time control subsystems. The F28M36x series devices are the second series of Concerto products.

The communication subsystem is based on the industry-standard 32-bit ARM Cortex-M3 CPU and features a variety of communication peripherals (including Ethernet 1588, USB OTG with PHY, Controller Area Network (CAN), UART, SSI, I2C) and an external interface.

The real-time control subsystem is based on TI's proprietary 32-bit C28x floating-point CPU and features the most flexible and highly accurate control peripherals, including fault-protected ePWM, encoder, and capture units - all implemented by TI's TMS320C2000 Piccolo and Delfino series products. In addition, the C28-CPU has been enhanced with a new VCU instruction accelerator capable of efficient Viterbi, complex arithmetic, 16-bit Fast Fourier Transform (FFT), and Cyclic Redundancy Check (CRC) algorithms.

It shares a high-speed analog subsystem and supplementary RAM memory, as well as on-chip voltage regulation and redundant timing circuits. Security considerations also include Error Correction Code (ECC), parity checking, and code secure memory, as well as documentation to assist with system-level industrial safety certification.

• Master Subsystem — ARM Cortex-M3
  • 125MHz
  • Embedded Memory
    • Up to 1MB Flash (ECC)
    • Up to 128KB RAM (ECC or Parity)
    • Up to 64KB Shared RAM
    • 2KB IPC Message RAM
  • Five UARTs
  • Four SSIs and one SPI
  • Two I²C
  • USB-OTG + PHY
  • 10/100 ENET 1588 MII
  • Two CAN modules (pin-bootable)
  • 32-channel μDMA
  • Dual security zones (128-bit password per zone)
  • EPI
  • μCRC module
  • Four general-purpose timers
  • Two watchdog timer modules
  • Endianness: Little-endian
• Clocking
  • On-chip crystal oscillator and external clock input
  • Dynamic PLL ratio change supported
• 1.2V digital, 1.8V analog, 3.3V I/O design
• IPC
  • 32 handshake channels
  • Four channels generate IPC interrupts
  • Usable for coordinating data transfers via IPC message RAM
• Up to 142 independently programmable, multiplexed GPIO pins
  • Glitch-free pulse I/O
• Control Subsystem — TMS320C28x 32-bit CPU
  • 150MHz
  • C28x core hardware built-in self-test
  • Embedded Memory
    • Up to 512KB Flash (ECC)
    • Up to 36KB RAM (ECC or Parity)
    • Up to 64KB Shared RAM
    • 2KB IPC Message RAM
  • IEEE-754 single-precision FPU
  • Viterbi, complex math, and CRC unit (VCU)
  • SCI
  • SPI
  • I2C
  • 6-channel DMA
  • 12 ePWM modules
    • 24 outputs (16 high-resolution)
  • Six 32-bit eCAP modules
  • Three 32-bit eQEP modules
  • McBSP
  • EPI
  • One security zone (128-bit password)
  • Three 32-bit timers
  • Endianness: Little-endian
• Analog Subsystem
  • Dual 12-bit ADC
  • Up to 2.88MSPS
  • Up to 24 channels
  • Four S/H circuits
  • Up to six comparators with 10-bit DAC
• Package
  • 289-ball ZWT nFBGA
• Temperature Options:
  • T: -40°C to 105°C (junction temperature)
  • S: -40°C to 125°C (junction temperature)
  • Q: –40ºC to 125°C (still air) (Q100 qualified for automotive applications)

• Solar inverters
• EV/HEV chargers
• Power line communication