NUVOTON N32905U3DN

The N3290x seires built on the ARM926EJ-S CPU core and integrated with JPEG codec, CMOS sensor interface, 32-channel SPU (Sound Processing Unit), ADC, DAC, for meeting various kinds of application needs while saving the BOM cost. The combination of ARM926 @ 200MHz, synchronous DRAM, 2D BitBLT accelerator, CMOS image sensor interface, LCD panel interface, USB 1.1 Host & USB2.0 HS Device makes N3290x series the best choice for LCD ELA devices. Maximum resolution for N3290 series is XVGA (1,024x768) @ TFT LCD panel. The 2D BitBLT accelerator accelerates the graphic compution to make the rendering smooth and off-load CPU to save power consumption. The N3290x seires is well-positioned in terms of cost/performance for the applications which bitmap graphics is extensively used or CMOS Image Sensor (CIS) interface is required. The N3290x series is for application under Linux OS and leverage the driver availability of emerging functionalities like Wi-Fi, browser, etc. On the other hand, the open source code environment also give the product development more flexible. To meet the different requirement of the overall system BOM cost, the different size of DRAM is stacked with N3290x main SoC into one package, that is, multi-chip package (MCP). The N32901x series particularly designed with 1Mbitx16 3.3V SDRAM. The N32903x series particularly designed with 4Mbitx16 1.8V DDR SDRAM. One 16Mbitx16 1.8V DDR2 SDRAM stacked inside the N32905x series to ensure higher performance and minimize the system design efforts, like EMI & noise coupling. Total BOM cost could be reduced by employing 2-layer PCB along with the elimination of damping resistors, EMI prevention components, etc. Advantages including, but not limited to, less PCB space, shorter lead time, and higher / reliable production yield.

• ARM926EJ-S 32-bit RISC CPU with 8KB I-Cache & 8KB D-Cache
• Frequency up to 200MHz@1.8V core power operation voltage
• JTAG interface supported for development and debugging
• 8KB internal SRAM and 16KB IBR internal booting ROM supported
• IBR booting messages displayed by UART console for debugging supported
• Different system booting modes supported: Memory card, SD card, SD-to-NAND flash bridge, Raw NAND Flash, SPI Flash, USB
• Totally 5 DMA channels supported
• 4 peripheral DMA channels for transfer between memory and on-chip peripherals, such as ADC, UART and SPI
• One dedicated channel for memory-to-memory transfer
• Byte, half-word and word data width types supported
• Single and burst transfer modes supported
• Block transfer supported in memory-to-memory transfer channel
• Color format transformation supported in memory-to-memory transfer channel
• Source color format could be RGB555, RGB565 and YCbCr422
• Destination color format could be RGB555, RGB565 and YCbCr422
• Auto reload supported for continuous data transfer
• Interrupt generation supported in the half-of-transfer or end-of-transfer
• CCIR601 & CCIR656 interfaces supported for connection to CMOS image sensor
• Resolution up to 2M pixel for Still Image Capture, 640×480 (VGA) resolution for MJPEG Video Streaming
• YUV422 and RGB565 color format supported for data-in from CMOS sensor
• YUV422, RGB565, RGB555 and Y-only color format supported for data storing to system memory
• Planar and packet data formats supported for data storing to system memory
• Image cropping supported

• ELA (Educational Learning Aid)
• HMI
• Security
• Home Appliance
• Advertisement