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TI SN74AHC273DBR
| Manufacturer | |
| MPN | SN74AHC273DBR |
| LCSC Part # | C2877489 |
| Packaging | SSOP-20 |
| Customer # | |
| Key Attributes | Octal D-Type Flip-Flops With Clear |
| Datasheet | TI SN74AHC273DBR |
| RoHS Compliance | 2 documents available |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | SSOP-20 | |
| Voltage - Supply | 2V~5.5V | |
| Number of Bits per Element | 8 | |
| Output Type | - | |
| Operating Temperature | -40℃~+125℃ | |
| Series | 74AHC Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 8mA | |
| Current - Output Low(IOL) | 8mA | |
| Setup Time | 4.5ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1ns | |
| Propagation Delay | 11ns@5V,50pF | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | SSOP-20 | |
| Voltage - Supply | 2V~5.5V | |
| Number of Bits per Element | 8 | |
| Output Type | - | |
| Operating Temperature | -40℃~+125℃ | |
| Series | 74AHC Series | |
| Synchronous/Asynchronous | Asynchronous |
| Type | Description | |
|---|---|---|
| Number of Elements | 1 | |
| Current - Output High(IOH) | 8mA | |
| Current - Output Low(IOL) | 8mA | |
| Setup Time | 4.5ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1ns | |
| Propagation Delay | 11ns@5V,50pF | |
| Trigger Type | Rising Edge |
Introduction
These devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
Features
- Operating Range 2-V to 5.5-VCC
- Contain eight flip-flops with single-rail outputs
- Direct clear input
- Individual data input to each flip-flop
- Latch-up performance exceeds 250 mA per JESD 17
- ESD protection exceeds JESD 22 2000-V human-body model (A114-A)
- 1000-V charged-device model (C101)
Applications
- Buffers and storage registers
- Shift registers
- Pattern generators
- Servers
- PCs and notebooks
- Network switches
- Memory systems databases
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | SSOP-20 | |
| Voltage - Supply | 2V~5.5V | |
| Number of Bits per Element | 8 | |
| Output Type | - | |
| Operating Temperature | -40℃~+125℃ | |
| Series | 74AHC Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 8mA | |
| Current - Output Low(IOL) | 8mA | |
| Setup Time | 4.5ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1ns | |
| Propagation Delay | 11ns@5V,50pF | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | SSOP-20 | |
| Voltage - Supply | 2V~5.5V | |
| Number of Bits per Element | 8 | |
| Output Type | - | |
| Operating Temperature | -40℃~+125℃ | |
| Series | 74AHC Series | |
| Synchronous/Asynchronous | Asynchronous |
| Type | Description | |
|---|---|---|
| Number of Elements | 1 | |
| Current - Output High(IOH) | 8mA | |
| Current - Output Low(IOL) | 8mA | |
| Setup Time | 4.5ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1ns | |
| Propagation Delay | 11ns@5V,50pF | |
| Trigger Type | Rising Edge |
Introduction
These devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
Features
- Operating Range 2-V to 5.5-VCC
- Contain eight flip-flops with single-rail outputs
- Direct clear input
- Individual data input to each flip-flop
- Latch-up performance exceeds 250 mA per JESD 17
- ESD protection exceeds JESD 22 2000-V human-body model (A114-A)
- 1000-V charged-device model (C101)
Applications
- Buffers and storage registers
- Shift registers
- Pattern generators
- Servers
- PCs and notebooks
- Network switches
- Memory systems databases
C2877489 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |