TI SN74AUP2G241DQER

The AUP family ensures a very low static- and dynamic-power consumption across the entire VC C range of 0.8 V to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity. The SN74AUP2G241 is designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoStar package technology uses the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Available in the Texas Instruments NanoStar Package
• Low Static-Power Consumption (ICC = 0.9 μA Maximum)
• Low Dynamic-Power Consumption (Cpd = 4.2 pF Typ at 3.3 V)
• Low Input Capacitance (Ci = 1.5 pF Typical)
• Low Noise – Overshoot and Undershoot <10% of VCC
• Ioff Supports Partial-Power-Down Mode Operation
• Wide Operating VCC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• tpd = ±9.9 ns Maximum at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22: 2000-V Human-Body Model (A114-B, Class II), 1000-V Charged-Device Model (C101)

• Battery-powered portable devices
• Three-state memory address drivers
• Clock drivers
• Bus-oriented receivers and transmitters