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TI SN65HVD1040AQDRQ1

Manufacturer
MPN
SN65HVD1040AQDRQ1
LCSC Part #
C273638
Packaging
SOIC-8
Customer #
Key Attributes
SN65HVD1040A-Q1 EMC-Optimized High-Speed CAN Transceiver
DatasheetTI SN65HVD1040AQDRQ1
RoHS Compliance2 documents available
Alternative Parts5
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers
ManufacturerTI
PackagingSOIC-8
Voltage - Supply4.75V~5.25V
TypeCAN Transceiver
number of channels1
Data Rate1Mbps
Operating Temperature-40℃~+125℃
FeaturesLow-power mode;Wake-up function;Bus Fault Protection;TXD dominant timeout;Thermal shutdown protection;Undervoltage Protection;ESD Protection
Supply Current50mA
Quiescent Supply Current12uA

Introduction

AI Translation

The SN65HVD1040A device meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). The device is qualified for use in automotive applications. As a CAN transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps). Designed for operation in especially harsh environments, the SN65HVD1040A-Q1 features cross-wire, overvoltage, and loss of ground protection from -27V to 40V, overtemperature protection, a –12-V to 12-V common-mode range, and can withstand voltage transients according to ISO 7637. STB (pin 8) provides two different modes of operation: high-speed mode or low-current standby mode. The highspeed mode of operation is selected by connecting STB (pin 8) to ground. If a high logic level is applied to the STB pin of the SN65HVD1040A-Q1, the device enters a low-current standby mode, while the receiver remains active in a low-power bus-monitor standby mode. In the low-current standby mode, a dominant bit greater than 5 μs on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller may then reactivate the device when it needs to transmit to the bus. A dominant time-out circuit in the SN65HVD1040A-Q1 prevents the driver from blocking network communication with a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD. SPLIT (pin 5) is available as a VCC/2 common-mode bus voltage bias for a split-termination network.

Features

AI Translation
  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following:
    • Device Temperature Grade 0: -40°C to +150°C Ambient Operating Temperature
    • Device HBM ESD Classification Level: 3A Level for All Pins Except 5, 6, and 7; 3B Level for Pins 5, 6 and 7
    • Device CDM ESD Classification Level C6
    • Device MM ESD Classification Level M3
  • Improved Drop-In Replacement for TJA1040
  • Meets or Exceeds the Requirements of ISO 11898-5
  • GIFT/ICT Compliant
  • ESD Protection up to ±12 kV (Human-Body Model) on Bus Pins
  • Low-Current Standby Mode With Bus Wake-Up, < 12 μA Maximum
  • High Electromagnetic Compliance (EMC)
  • Bus-Fault Protection of -27V to 40V
  • Dominant Time-Out Function
  • Thermal Shutdown Protection
  • SPLIT Voltage Source for Common-Mode Stabilization of Bus Through Split Termination
  • Digital Inputs Compatible With 3.3-V and 5-V Microprocessors
  • Power-Up and Power-Down Glitch-Free Bus Inputs and Outputs
  • High Input Impedance With Low VCC Monotonic Outputs During Power Cycling

Applications

AI Translation
  • GMW3122 Dual-Wire CAN Physical Layers
  • SAE J2284 High-Speed CAN for Automotive Applications
  • SAE J1939 Standard Data Bus Interface
  • ISO 11783 Standard Data Bus Interface
  • NMEA 2000 Standard Data Bus Interface