TI CD4068BPWR
| Manufacturer | |
| MPN | CD4068BPWR |
| LCSC Part # | C2682015 |
| Packaging | TSSOP-14 |
| Customer # | |
| Key Attributes | CMOS 8-input NAND/AND Gate |
| Datasheet | TI CD4068BPWR |
| RoHS Compliance | 2 documents available |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | TI | |
| Packaging | TSSOP-14 | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V | |
| Logic Family | 4000B Series | |
| Propagation Delay | 110ns@15V,50pF | |
| Current - Output Low(IOL) | 6.8mA | |
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Current - Output High(IOH) | 6.8mA | |
| Voltage - Supply | 3V~18V | |
| Features | - | |
| Operating Temperature | -55℃~+125℃ | |
| Number of Gates | 1 | |
| Output Logic Level - Low | 50mV |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | TI | |
| Packaging | TSSOP-14 | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V | |
| Logic Family | 4000B Series | |
| Propagation Delay | 110ns@15V,50pF | |
| Current - Output Low(IOL) | 6.8mA |
| Type | Description | |
|---|---|---|
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Current - Output High(IOH) | 6.8mA | |
| Voltage - Supply | 3V~18V | |
| Features | - | |
| Operating Temperature | -55℃~+125℃ | |
| Number of Gates | 1 | |
| Output Logic Level - Low | 50mV |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
CD4068B NAND/AND gate: provides the system designer with direct.imple. mentation of the positive-togic 8-input NAND and AND functions and supplements the existing family of CMOS gates.
Features
AI Translation
- Medium-Speed Operation: tPhL. ΔPLH = 75 ns (typ.) at VDD = 10 V
- Buffered inputs and outputs
- 5-V, 10-V, and 15-V parametric ratings
- Standardized symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and ≥ 50 ℃
- Noise margin (over full package-temperature range): 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 138, "Standard Specifications for Description of 'B' Series CMOS Devices"
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | TI | |
| Packaging | TSSOP-14 | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V | |
| Logic Family | 4000B Series | |
| Propagation Delay | 110ns@15V,50pF | |
| Current - Output Low(IOL) | 6.8mA | |
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Current - Output High(IOH) | 6.8mA | |
| Voltage - Supply | 3V~18V | |
| Features | - | |
| Operating Temperature | -55℃~+125℃ | |
| Number of Gates | 1 | |
| Output Logic Level - Low | 50mV |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | TI | |
| Packaging | TSSOP-14 | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V | |
| Logic Family | 4000B Series | |
| Propagation Delay | 110ns@15V,50pF | |
| Current - Output Low(IOL) | 6.8mA |
| Type | Description | |
|---|---|---|
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Current - Output High(IOH) | 6.8mA | |
| Voltage - Supply | 3V~18V | |
| Features | - | |
| Operating Temperature | -55℃~+125℃ | |
| Number of Gates | 1 | |
| Output Logic Level - Low | 50mV |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
CD4068B NAND/AND gate: provides the system designer with direct.imple. mentation of the positive-togic 8-input NAND and AND functions and supplements the existing family of CMOS gates.
Features
AI Translation
- Medium-Speed Operation: tPhL. ΔPLH = 75 ns (typ.) at VDD = 10 V
- Buffered inputs and outputs
- 5-V, 10-V, and 15-V parametric ratings
- Standardized symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and ≥ 50 ℃
- Noise margin (over full package-temperature range): 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 138, "Standard Specifications for Description of 'B' Series CMOS Devices"
C2682015 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



