TI SN74AVC24T245ZRGR
| Manufacturer | |
| MPN | SN74AVC24T245ZRGR |
| LCSC Part # | C2677483 |
| Packaging | BGA-83(4.5x10) |
| Customer # | |
| Key Attributes | BGA-83(4.5x10) Buffers, Drivers, Receivers, Transceivers |
| Datasheet | TI SN74AVC24T245ZRGR |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | BGA-83(4.5x10) | |
| Function | Power-off protection;Output enable high-impedance |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI |
| Type | Description | |
|---|---|---|
| Packaging | BGA-83(4.5x10) | |
| Function | Power-off protection;Output enable high-impedance |
Introduction
This 24-bit non-inverting bus transceiver uses two separate configurable power rails. Optimized to operate with VCCA/VCCB set within the range of 1.4V to 3.6V. The device can operate with VCCA/VCCB as low as 1.2V. Port A is designed to track VCCA, which supports any supply voltage from 1.2V to 3.6V. Port B is designed to track VCCB, which accepts any supply voltage from 1.2V to 3.6V, enabling universal low-voltage bidirectional translation between the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.
Designed for asynchronous communication between data buses. Based on the logic level at the direction control (DIR) input, the device transfers data from the A bus to the B bus, or from the B bus to the A bus. The output enable (OE) input can be used to disable the outputs, effectively isolating the buses.
Designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1OE, 2OE, 3OE, 4OE, 5OE, and 6OE) are powered by VCCA.
Features
- Control input level VI_H/VI_L referenced to V_CCA voltage
- V_CC isolation feature — if any V_CC input is at GND, all outputs are high-impedance
- Over-voltage tolerant I/Os enable mixed-voltage data communication
- Fully configurable dual-rail design supporting full supply voltage range of 1.2V to 3.6V on each port
- I_off supports partial power-down mode operation
- I/Os withstand up to 4.6V
- Maximum data rate:
- 380Mbps (1.8V to 3.3V translation)
- 200Mbps (below 1.8V to 3.3V translation)
- 200Mbps (translation to 2.5V or 1.8V)
- 150Mbps (translation to 1.5V)
- 100Mbps (translation to 1.2V)
- Latch-up performance exceeds 100mA per JESD 78 Class II
- ESD protection exceeds JESD 22 requirements:
- 8000V Human Body Model (A114-A)
- 200V Machine Model (A115-A)
- 1000V Charged Device Model (C101)
- The device fully meets specifications for partial power-down applications using I_off. The I_off circuit disables the outputs, preventing destructive back-current flow from the device when powered down.
Applications
- Consumer Electronics
- Industrial
- Enterprise Telecommunications
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | BGA-83(4.5x10) | |
| Function | Power-off protection;Output enable high-impedance |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI |
| Type | Description | |
|---|---|---|
| Packaging | BGA-83(4.5x10) | |
| Function | Power-off protection;Output enable high-impedance |
Introduction
This 24-bit non-inverting bus transceiver uses two separate configurable power rails. Optimized to operate with VCCA/VCCB set within the range of 1.4V to 3.6V. The device can operate with VCCA/VCCB as low as 1.2V. Port A is designed to track VCCA, which supports any supply voltage from 1.2V to 3.6V. Port B is designed to track VCCB, which accepts any supply voltage from 1.2V to 3.6V, enabling universal low-voltage bidirectional translation between the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.
Designed for asynchronous communication between data buses. Based on the logic level at the direction control (DIR) input, the device transfers data from the A bus to the B bus, or from the B bus to the A bus. The output enable (OE) input can be used to disable the outputs, effectively isolating the buses.
Designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1OE, 2OE, 3OE, 4OE, 5OE, and 6OE) are powered by VCCA.
Features
- Control input level VI_H/VI_L referenced to V_CCA voltage
- V_CC isolation feature — if any V_CC input is at GND, all outputs are high-impedance
- Over-voltage tolerant I/Os enable mixed-voltage data communication
- Fully configurable dual-rail design supporting full supply voltage range of 1.2V to 3.6V on each port
- I_off supports partial power-down mode operation
- I/Os withstand up to 4.6V
- Maximum data rate:
- 380Mbps (1.8V to 3.3V translation)
- 200Mbps (below 1.8V to 3.3V translation)
- 200Mbps (translation to 2.5V or 1.8V)
- 150Mbps (translation to 1.5V)
- 100Mbps (translation to 1.2V)
- Latch-up performance exceeds 100mA per JESD 78 Class II
- ESD protection exceeds JESD 22 requirements:
- 8000V Human Body Model (A114-A)
- 200V Machine Model (A115-A)
- 1000V Charged Device Model (C101)
- The device fully meets specifications for partial power-down applications using I_off. The I_off circuit disables the outputs, preventing destructive back-current flow from the device when powered down.
Applications
- Consumer Electronics
- Industrial
- Enterprise Telecommunications
C2677483 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

