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TI SN74CBTD3384CDWR

Manufacturer
MPN
SN74CBTD3384CDWR
LCSC Part #
C2674503
Packaging
SOIC-24-300mil
Customer #
Key Attributes
10-BIT FET BUS SWITCH WITH LEVEL SHIFTING 5-V BUS SWITCH WITH -2-V UNDERSHOOT PROTECTION
DatasheetTI SN74CBTD3384CDWR
RoHS Compliance2 documents available
Alternative Parts1
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Signal Switches, Multiplexers, Decoders
ManufacturerTI
PackagingSOIC-24-300mil
Type-
Series74CBT
Number of Channels10/10
Voltage - Supply4.5V~5.5V
Operating Temperature-40℃~+85℃
Quiescent Current1.5mA
Current - Output High(IOH)-
Propagation Delay0.15ns@5V,50pF
FunctionPower-off protection;Level shifting;Output enable high-impedance
Current - Output Low(IOL)-

Introduction

AI Translation

The SN74CBTD3384C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (rₒₙ), allowing for minimal propagation delay. This device features an integrated diode in series with VCC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3384C provides protection for undershoot up to -2V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The SN74CBTD3384C is organized as two 5-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE is low, the associated 5-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OC is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

Features

AI Translation
  • Undershoot Protection for Off-Isolation on A and B Ports Up To -2 V
  • Integrated Diode to VCC Provides 5-V Input Down To 3.3-V Output Level Shift
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (rₒₙ) (rₒₙ = 3 Ω Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cᵢₒ(ₒff) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • VCC Operating Range From 4.5 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

Applications

AI Translation
  • Memory Interleaving
  • Bus Isolation
  • Low-Distortion Signal Gating