LCSC Electronics logoLCSC Electronics svg logo
Zaloguj
USD
ST SR2LARU product image
Zdjęcia poglądowe

ST SR2LARU

Producent
Nr części prod.
SR2LARU
Nr LCSC
C2066501
Opak.
UDFN-6(1.3x1.6)
Numer Klienta
Klucz. cechy
6 pin Smart ResetTM
Karta KatalogowaST SR2LARU
Zgodność z RoHS3 dokumentów dostępnych
Na stanie: 9
9 W magazynie, wysyłka natychmiastowa
Minimum: 1Wielokrotność: 1Jednostka sprzedaży: Piece
Dodaj do Listy BOM
Szt.Cena jedn.Suma całkowita
1+$ 0.8197$ 0.82
10+$ 0.8008$ 8.01
30+$ 0.7898$ 23.69
100+$ 0.7772$ 77.72
Standardowa Obudowa3000/Full Reel
Lepsza cena za większą ilość?
$

Specyfikacje Produktu

Wszystko
TypOpis
KategoriaIntegrated Circuits (ICs)/Power Management (PMIC)/Supervisors
ProducentST
Opak.UDFN-6(1.3x1.6)
Reset Timeout-
output typeOpen-drain
Operating Temperature-40℃~+85℃@(TA)
FunctionManual reset input
Reset Active LevelActive Low
standby current1.5uA
Voltage - Supply1.65V~5.5V
Threshold Voltage-
Number of Voltages Monitored1

Opis

Tłumaczenie AI

The Smart ResetTM devices provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart ResetTM input delay time (tsRc) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button. This reset configuration provides versatility and allows the application to distinguish between a software generated interrupt and a hard system reset. When the input pushbutton are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-button closed for the extended setup time tsRc causes a hard reset of the processor through the reset output. The SR2 has two combined delayed Smart ResetTM inputs ((\overline{{\mathsf{S R}0}},,\overline{{\mathsf{S R}1}})) with preset delayed Smart ResetTM setup time (tsRc). The reset output is asserted after both of the Smart ResetTM inputs were held active for the selected tsRc delay time. Depending on selected option the (\overline{{\mathsf{R S T}}}) output remains asserted either until at least one SR input goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for tREc (i.e. factory-programmed). The reset output, (\overline{{\mathsf{R S T}}}), is active low or active high, push-pull or open drain with optional pull-up resistor. The device fully operates over a broad (\mathsf{V}_{\mathsf{C C}}) range 1.65 V to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to (1.0;V).

Funkcje

Tłumaczenie AI
  • Operating voltage 1.65 V to 5.5 V
  • Low supply current (1.5,\mu A)
  • Integrated test mode
  • Dual Smart ResetTM push-button inputs with fixed extended reset setup delay (tsRc) from 0.5 s to (10\ s) in 0.5 s steps (typ.), option with internal pull-up resistor
  • Push-button controlled reset pulse duration Option 1: fully push-button controlled, no fixed or minimum pulse width guaranteed Option 2: defined output reset pulse duration (tREc), factory-programmed
  • No power-on reset
  • Single reset output Active low or active high Push-pull or open drain with optional pullup resistor
  • Fixed Smart ResetTM input logic voltage level
  • Operating temperature: - (40,^{\circ}C) to (+85,^{\circ}C)
  • UDFN6 package: (1.6\ mm\times1.3\ mm)
  • ECOPACK (B_{2}) (RoHS compliant, Halogen Free)

Zastosowania

Tłumaczenie AI
  • Wearable Activity tracker
  • Smartwatch
  • Smartglasses