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Alliance Memory AS7C4096A-12TCNTR product image
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Alliance Memory AS7C4096A-12TCNTR

제조업체
제조사 품번
AS7C4096A-12TCNTR
LCSC 번호
C2063989
포장
TSOP-44-10.2mm
고객 번호
주요 제원
4Mbit 4.5V~5.5V Parallel Port (Parallel) TSOP-44-10.2mm Memory RoHS
데이터시트pdf iconAlliance Memory AS7C4096A-12TCNTR
대체 부품20
품절
재입고 알림
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
수량단가(참고용)총액
1+$ 4.8776$ 4.88
200+$ 1.8878$ 377.56
500+$ 1.8214$ 910.70
1,000+$ 1.789$ 1789.00
표준 패키지1000/Full Reel
수량이 많을수록 더 좋은 가격?
$

제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Memory/Memory
제조업체Alliance Memory
포장TSOP-44-10.2mm
Operating Temperature0℃~+70℃
FeaturesAuto power-down function
Memory Size4Mbit
Voltage - Supply4.5V~5.5V
Access Time12ns
Current - Supply140mA
InterfaceParallel Port (Parallel)
Standby Supply Current10mA

개요

AI 번역

The AS7C4096A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 524,288 words x 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA,tRC,tWC) of 10/12/15/20 ns with output enable access times (ΔtoE) of 5/6 ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems. When CE is high the device enters standby mode. The device is guaranteed not to exceed 55mW power consumption in CMOS standby mode. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O1 - I/O8 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE). A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chip drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output drivers stay in high-impedance mode. All chip inputs and outputs are TTL-compatible, and operation is from a single 5.0V supply voltage. This device is available as per industry standard 400-mil 36-pin SOJ and 44-pin TSOP 2 packages.

주요 특징

AI 번역
  • Pin compatible to AS7C4096
  • Industrial and commercial temperature
  • Organization: 524,288 words x 8 bits
  • Center power and ground pins
  • High speed - 10/12/15/20 ns address access time - 5/6 ns output enable access time
  • Low power consumption: ACTIVE - 880mW/max @ 10 ns
  • Low power consumption: STANDBY - 55mW/max CMOS
  • Equal access and cycle times
  • Easy memory expansion with CE, OE inputs
  • TTL-compatible, three-state I/O
  • JEDEC standard packages - 400 mil 36-pin SOJ - 44-pin TSOP 2
  • ESD protection ≥2000 volts
  • Latch-up current ≥200 mA

대체 부품

MPN제조사포장재고단가
AS7C4096A-12TCNAlliance MemoryTSOP-44-10.2mm0$ 4.7231
AS7C4096A-12TINAlliance MemoryTSOP-44-10.2mm0$ 5.5032
AS7C4096A-12TINTRAlliance MemoryTSOP-44-10.2mm0$ 4.8776
AS7C4098A-12TINAlliance MemoryTSOPII-44-10.2mm0$ 5.5812
AS7C4098A-12TCNAlliance MemoryTSOP-44-10.2mm0$ 5.2972
AS7C4098A-12TINTRAlliance MemoryTSOP-44-10.2mm0$ 4.8776
AS7C4098A-12TCNTRAlliance MemoryTSOP-44-10.2mm0$ 4.8776
AS7C4096A-15TCNAlliance MemoryTSOPII-44-10.2mm0$ 5.2972
AS7C4096A-15TCNTRAlliance MemoryTSOP-44-10.2mm0$ 4.8776
R1RP0416DSB-2LR#S1RENESASTSOPII-440$ 12.2398
R1RP0416DSB-2PR#S1RENESASTSOPII-440$ 12.2398
R1RW0416DSB-2PR#S1RENESASTSOPII-440$ 12.2398
R1RW0416DSB-2SR#D1RENESASTSOPII-440$ 13.5828
R1RP0416DSB-2PR#D1RENESASTSOPII-440$ 10.4253
R1RP0416DSB-2LR#D1RENESASTSOPII-440$ 10.7632
AS7C4098A-15TCNAlliance MemoryTSOP-44-10.2mm0$ 5.2972
AS7C4098A-15TINAlliance MemoryTSOPII-44-10.2mm0$ 5.2972
AS7C4098A-15TINTRAlliance MemoryTSOP-44-10.2mm0$ 4.8776
AS7C4098A-15TCNTRAlliance MemoryTSOP-44-10.2mm0$ 4.8776
AS7C4096A-20TCNTRAlliance MemoryTSOP-44-10.2mm0$ 5.1292