MICROCHIP ATMEGA16A-MUR

The ATmega16A is a low-power CMOS 8-bit microcontroller based on the Atmel AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16A achieves throughputs approaching 1MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

The Atmel AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega16A provides the following features: 16Kbytes of In-System Programmable Flash Program memory with Read-While-Write capabilities; 512bytes EEPROM; 1Kbyte SRAM; 32 general purpose I/O lines, 32 general purpose working registers; a JTAG interface for Boundary-scan; On-chip Debugging support and programming; three flexible Timer/Counters with compare modes; Internal and External Interrupts; a serial programmable USART; a byte oriented Two-wire Serial Interface, an 8-channel; 10-bit ADC with optional differential input stage with programmable gain (TQFP package only); a programmable Watchdog Timer with Internal Oscillator; an SPI serial port; and six software selectable power saving modes. The Idle mode stops the CPU while allowing the USART; Two-wire interface; A/D Converter; SRAM; Timer/Counters; SPI port; and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next External Interrupt or Hardware Reset. In Power-save mode, the Asynchronous Timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with lowpower consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run.

The device is manufactured using Atmels high density nonvolatile memory technology. The On-chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true ReadWhile-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega16A is a powerful microcontroller that provides a highly-flexible and costeffective solution to many embedded control applications.

The ATmega16A is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.

• High-performance, Low-power Atmel AVR 8-bit Microcontroller
• Advanced RISC Architecture
• 131 Powerful Instructions – Most Single-clock Cycle Execution
• 32×8 General Purpose Working Registers
• Fully Static Operation
• Up to 16MIPS Throughput at 16MHz
• On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
• 16KBytes of In-System Self-programmable Flash program memory
• 512Bytes EEPROM
• 1KByte Internal SRAM
• Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
• Data retention: 20 years at 85℃/100 years at 25℃
• Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
• Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 Compliant) Interface Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
• Byte-oriented Two-wire Serial Interface
• Programmable Serial USART
• Master/Slave SPI Serial Interface
• Programmable Watchdog Timer with Separate On-chip Oscillator
• On-chip Analog Comparator
• Special Microcontroller Features
• Power-on Reset and Programmable Brown-out Detection
• Internal Calibrated RC Oscillator
• External and Internal Interrupt Sources
• Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby
• I/O and Packages 32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
• Operating Voltages 2.7 - 5.5V
• Speed Grades 0 - 16MHz
• Power Consumption @ 1MHz, 3V, and 25℃ Active: 0.6mA Idle Mode: 0.2mA Power-down Mode: <1μA