micron MT60B1G16HC-48B:A
| Manufacturer | |
| MPN | MT60B1G16HC-48B:A |
| LCSC Part # | C20530574 |
| Packaging | 102-VFBGA (9x14) |
| Customer # | |
| Key Attributes | 16Gbit 2.4GHz DDR5 SDRAM 102-VFBGA (9x14) Memory |
| Datasheet | micron MT60B1G16HC-48B:A |
| Alternative Parts | 2 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron | |
| Packaging | 102-VFBGA (9x14) | |
| Operating Temperature | 0℃~+95℃ | |
| Features | Auto self-refresh;On-chip error correction code;Data mask function;CRC function;Write leveling function;ZQ calibration function;Asynchronous reset function | |
| Refresh Current | 102mA | |
| Memory Size | 16Gbit | |
| Voltage - Supply | 122mA;1.1V | |
| Clock Frequency | 2.4GHz | |
| Memory Format | DDR5 SDRAM |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron | |
| Packaging | 102-VFBGA (9x14) | |
| Operating Temperature | 0℃~+95℃ | |
| Features | Auto self-refresh;On-chip error correction code;Data mask function;CRC function;Write leveling function;ZQ calibration function;Asynchronous reset function |
| Type | Description | |
|---|---|---|
| Refresh Current | 102mA | |
| Memory Size | 16Gbit | |
| Voltage - Supply | 122mA;1.1V | |
| Clock Frequency | 2.4GHz | |
| Memory Format | DDR5 SDRAM |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- VDD = VDDQ = 1.1V (nominal)
- VPP = 1.8V (nominal)
- On-chip, internal, adjustable VREF generation for DQ, CA, CS
- 1.1V pseudo open-drain I/O
- TC up to 95°C
- 32ms, 8192-cycle refresh up to 85°C
- 16ms, 8192-cycle refresh from >85°C to 95°C
- 32 internal banks (x4, x8): 4 banks per group, 8 bank groups
- 16 internal banks (x16): 4 banks per group, 4 bank groups
- 16n-bit prefetch architecture
- 1-cycle/2-cycle command structure
- 2N mode
- All-bank and same-bank refresh
- Multi-Purpose Command (MPC)
- CS/CA training mode
- On-chip ECC (bounded fault)
- ECC transparency and error scrubbing
- Decision Feedback Equalization (DFE)
- Loopback mode
- Command-based non-target (NT) nominal, DQ/DQS parking, and dynamic write on-die termination (ODT)
- sPPR and hPPR capability
- Per-DRAM addressability
- Compliant with JEDEC JESD-79.5
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron | |
| Packaging | 102-VFBGA (9x14) | |
| Operating Temperature | 0℃~+95℃ | |
| Features | Auto self-refresh;On-chip error correction code;Data mask function;CRC function;Write leveling function;ZQ calibration function;Asynchronous reset function | |
| Refresh Current | 102mA | |
| Memory Size | 16Gbit | |
| Voltage - Supply | 122mA;1.1V | |
| Clock Frequency | 2.4GHz | |
| Memory Format | DDR5 SDRAM |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | micron | |
| Packaging | 102-VFBGA (9x14) | |
| Operating Temperature | 0℃~+95℃ | |
| Features | Auto self-refresh;On-chip error correction code;Data mask function;CRC function;Write leveling function;ZQ calibration function;Asynchronous reset function |
| Type | Description | |
|---|---|---|
| Refresh Current | 102mA | |
| Memory Size | 16Gbit | |
| Voltage - Supply | 122mA;1.1V | |
| Clock Frequency | 2.4GHz | |
| Memory Format | DDR5 SDRAM |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- VDD = VDDQ = 1.1V (nominal)
- VPP = 1.8V (nominal)
- On-chip, internal, adjustable VREF generation for DQ, CA, CS
- 1.1V pseudo open-drain I/O
- TC up to 95°C
- 32ms, 8192-cycle refresh up to 85°C
- 16ms, 8192-cycle refresh from >85°C to 95°C
- 32 internal banks (x4, x8): 4 banks per group, 8 bank groups
- 16 internal banks (x16): 4 banks per group, 4 bank groups
- 16n-bit prefetch architecture
- 1-cycle/2-cycle command structure
- 2N mode
- All-bank and same-bank refresh
- Multi-Purpose Command (MPC)
- CS/CA training mode
- On-chip ECC (bounded fault)
- ECC transparency and error scrubbing
- Decision Feedback Equalization (DFE)
- Loopback mode
- Command-based non-target (NT) nominal, DQ/DQS parking, and dynamic write on-die termination (ODT)
- sPPR and hPPR capability
- Per-DRAM addressability
- Compliant with JEDEC JESD-79.5
C20530574 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |

