micron MT47H256M8THN-3:H TR

The 2Gb (dual-die) DDR2 SDRAM is a high-speed CMOS dynamic random access memory device containing 2,147,483,648 bits, internally configured as two 1Gb DDR2 SDRAM devices each with 8 banks. Each DDR2 SDRAM die uses a double data rate architecture for high-speed operation. The dual-die addressing scheme is identical to that of single-die devices; additionally, multiple chip select signals are used to select the desired bank group. This dual-die data sheet provides only a general description, package dimensions, and pin assignment information. For complete information on individual die initialization, register definitions, command descriptions, and die operations, refer to the Micron 1Gb DDR2 data sheet.

• Micron 1Gb die
• Two bank groups (with dual CS#, ODT, and CKE pins)
• 8 internal banks per bank group for concurrent operation
• VDD = VDDQ = +1.8V ± 0.1V
• JEDEC standard 63-pin package
• Thin package profile (max thickness 1.2mm)