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TI SN74AVC20T245DGGRRoHS

Manufacturer
MPN
SN74AVC20T245DGGR
LCSC Part #
C201959
Packaging
TSSOP-56-6.1mm
Customer #
Key Attributes
20-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
Datasheetpdf iconTI SN74AVC20T245DGGR
In-Stock: 3,618
3,618 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 2.3983$ 2.40
10+$ 2.1095$ 21.10
30+$ 1.905$ 57.15
100+$ 1.7184$ 171.84
500+$ 1.6324$ 816.20
1,000+$ 1.5983$ 1598.30
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingTSSOP-56-6.1mm
Input type-
Voltage - Supply1.2V~3.6V
Output TypeTri-State
Current - Output High(IOH)12mA
Series74AVC
Operating Temperature-40℃~+85℃
Current - Output Low(IOL)12mA
Number of Bits per Element10
Channel TypeBidirectional
FeaturesPower-off isolation;Level shifting;Output enable
Number of Elements2
Propagation Delay3.4ns@3.3V,50pF
Quiescent Current65uA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

The SN74AVC20T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVC20T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input is used to disable the outputs so that the buses are isolated. The SN74AVC20T245 is designed so that the control (1DIR, 2DIR, etc., and 2OE) inputs are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OC should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.