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XBLW SN74HC595DTR(XBLW)
| Manufacturer | XBLWAsian Brands |
| MPN | SN74HC595DTR(XBLW) |
| LCSC Part # | C18723531 |
| Packaging | SOP-16 |
| Customer # | |
| Key Attributes | 8-bit Serial-in, Serial or Parallel-out Shift Register with Output Latches; 3-state |
| Datasheet | XBLW SN74HC595DTR(XBLW) |
| RoHS Compliance | 2 documents available |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | XBLW | |
| Packaging | SOP-16 | |
| Operating temperature | -40℃~+105℃ | |
| Pd - Power Dissipation | 500mW | |
| Voltage - Supply | 2V~6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | - | |
| Series | 74HC | |
| Current - Output Low(IOL) | - | |
| Number of Elements | 1 | |
| Output Current | - | |
| Features | Asynchronous clear function;Output enable | |
| Propagation Delay | 16ns@6V,50pF | |
| Function | Serial-to-Serial or Parallel |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | XBLW | |
| Packaging | SOP-16 | |
| Operating temperature | -40℃~+105℃ | |
| Pd - Power Dissipation | 500mW | |
| Voltage - Supply | 2V~6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | - |
| Type | Description | |
|---|---|---|
| Series | 74HC | |
| Current - Output Low(IOL) | - | |
| Number of Elements | 1 | |
| Output Current | - | |
| Features | Asynchronous clear function;Output enable | |
| Propagation Delay | 16ns@6V,50pF | |
| Function | Serial-to-Serial or Parallel |
Introduction
The SN74HC595 is an 8-bit serial-in, serial or parallel-out shift register with storage register and 3-state outputs. The shift register and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) for cascading, along with an asynchronous reset MR input. When MR is low, the shift register is reset. Data is shifted on the low-to-high transition of the SHCP input. Data in the shift register is transferred to the storage register on the low-to-high transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. When the output enable input (OE) is low, the data in the storage register appears at the outputs. When OE is high, the outputs enter a high-impedance off-state. Operation of the OE input does not affect the state of the registers. The inputs include clamp diodes, which allow the input interface to be connected to voltages exceeding VCC using current-limiting resistors.
Features
- 8-bit serial input
- 8-bit serial or parallel output
- Storage register with 3-state outputs
- Shift register with direct clear
- Operating temperature range: -40°C to +125°C
- Package: DIP-16, SOP-16, TSSOP-16
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | XBLW | |
| Packaging | SOP-16 | |
| Operating temperature | -40℃~+105℃ | |
| Pd - Power Dissipation | 500mW | |
| Voltage - Supply | 2V~6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | - | |
| Series | 74HC | |
| Current - Output Low(IOL) | - | |
| Number of Elements | 1 | |
| Output Current | - | |
| Features | Asynchronous clear function;Output enable | |
| Propagation Delay | 16ns@6V,50pF | |
| Function | Serial-to-Serial or Parallel |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | XBLW | |
| Packaging | SOP-16 | |
| Operating temperature | -40℃~+105℃ | |
| Pd - Power Dissipation | 500mW | |
| Voltage - Supply | 2V~6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | - |
| Type | Description | |
|---|---|---|
| Series | 74HC | |
| Current - Output Low(IOL) | - | |
| Number of Elements | 1 | |
| Output Current | - | |
| Features | Asynchronous clear function;Output enable | |
| Propagation Delay | 16ns@6V,50pF | |
| Function | Serial-to-Serial or Parallel |
Introduction
The SN74HC595 is an 8-bit serial-in, serial or parallel-out shift register with storage register and 3-state outputs. The shift register and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) for cascading, along with an asynchronous reset MR input. When MR is low, the shift register is reset. Data is shifted on the low-to-high transition of the SHCP input. Data in the shift register is transferred to the storage register on the low-to-high transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. When the output enable input (OE) is low, the data in the storage register appears at the outputs. When OE is high, the outputs enter a high-impedance off-state. Operation of the OE input does not affect the state of the registers. The inputs include clamp diodes, which allow the input interface to be connected to voltages exceeding VCC using current-limiting resistors.
Features
- 8-bit serial input
- 8-bit serial or parallel output
- Storage register with 3-state outputs
- Shift register with direct clear
- Operating temperature range: -40°C to +125°C
- Package: DIP-16, SOP-16, TSSOP-16
C18723531 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |