AMD/XILINX XCR3128XL-10CS144C
| Manufacturer | |
| MPN | XCR3128XL-10CS144C |
| LCSC Part # | C1556290 |
| Packaging | LCSBGA-144 |
| Customer # | |
| Key Attributes | LCSBGA-144 FPGAs (Field Programmable Gate Array) |
| Datasheet | AMD/XILINX XCR3128XL-10CS144C |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Manufacturer | AMD/XILINX | |
| Packaging | LCSBGA-144 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Manufacturer | AMD/XILINX |
| Type | Description | |
|---|---|---|
| Packaging | LCSBGA-144 |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
The CoolRunner™ XPLA3 XCR3128XL device is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of eight function blocks provide 3,000 usable gates. Pin-to-pin propagation delays are as fast as 5.5 ns with a maximum system frequency of 175 MHz.
Features
AI Translation
- Low power 3.3V 128 macrocell CPLD
- 5.5 ns pin-to-pin logic delays
- System frequencies up to 175 MHz
- 128 macrocells with 3,000 usable gates
- Available in small footprint packages 144-pin TQFP (108 user I/O pins) 144-ball CS BGA (108 user I/O) 100-pin VQFP (84 user I/O)
- Ultra low power operation
- Typical Standby Current of 17μA at 25℃
- 5V tolerant I/O pins with 3.3V core supply
- Advanced 0.35 micron five layer metal EEPROM process
- Fast Zero Power™ (FZP) CMOS design technology
- 3.3V PCI electrical specification compatible outputs (no internal clamp diode on any input or I/O)
- In-system programming
- Input registers
- Predictable timing model
- Up to 23 available clocks per function block
- Excellent pin retention during design changes
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Four global clocks
- Eight product term control terms per function block
- Fast ISP programming times
- Port Enable pin for additional I/O
- 2.7V to 3.6V supply voltage at industrial temperature range
- Programmable slew rate control per output
- Security bit prevents unauthorized access
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 19.4188 | $ 19.42 |
| 200+ | $ 7.5151 | $ 1503.02 |
| 500+ | $ 7.2519 | $ 3625.95 |
| 1,000+ | $ 7.1203 | $ 7120.30 |
Standard Packaging198/Full Bag | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Manufacturer | AMD/XILINX | |
| Packaging | LCSBGA-144 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Manufacturer | AMD/XILINX |
| Type | Description | |
|---|---|---|
| Packaging | LCSBGA-144 |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
The CoolRunner™ XPLA3 XCR3128XL device is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of eight function blocks provide 3,000 usable gates. Pin-to-pin propagation delays are as fast as 5.5 ns with a maximum system frequency of 175 MHz.
Features
AI Translation
- Low power 3.3V 128 macrocell CPLD
- 5.5 ns pin-to-pin logic delays
- System frequencies up to 175 MHz
- 128 macrocells with 3,000 usable gates
- Available in small footprint packages 144-pin TQFP (108 user I/O pins) 144-ball CS BGA (108 user I/O) 100-pin VQFP (84 user I/O)
- Ultra low power operation
- Typical Standby Current of 17μA at 25℃
- 5V tolerant I/O pins with 3.3V core supply
- Advanced 0.35 micron five layer metal EEPROM process
- Fast Zero Power™ (FZP) CMOS design technology
- 3.3V PCI electrical specification compatible outputs (no internal clamp diode on any input or I/O)
- In-system programming
- Input registers
- Predictable timing model
- Up to 23 available clocks per function block
- Excellent pin retention during design changes
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Four global clocks
- Eight product term control terms per function block
- Fast ISP programming times
- Port Enable pin for additional I/O
- 2.7V to 3.6V supply voltage at industrial temperature range
- Programmable slew rate control per output
- Security bit prevents unauthorized access
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |

