TI CDCVF25081PW

The CDCVF25081 is a high-performance, low-skew, low-jitter PLL clock driver. It uses a PLL to precisely calibrate the frequency and phase of the output clock based on the input clock signal. The outputs are organized into 2 banks with a total of 8 buffered CLKIN outputs. When no CLKIN signal is present, the device automatically drives the outputs to a low state (shutdown mode). The S1 and S2 pins allow selection of PLL or PLL-bypass output. When left open, the outputs are disabled to a logic-low state. The device supports a failsafe feature and integrates input hysteresis to prevent random output oscillation in the absence of an input signal. The device operates from a 3.3V supply and is rated for an ambient temperature range of –40°C to 85°C.

• PLL-based zero delay buffer
• 1 clock input, 2 banks of 4 outputs
• No external RC network required
• Supply voltage: 3V to 3.6V
• Operating frequency: 8 MHz to 200 MHz
• Low additive jitter (cycle-to-cycle): ±100ps at 66MHz to 200MHz
• Power-down mode supported
• Current consumption: <20μA in power-down mode
• 25Ω on-chip series damping resistor
• Industrial temperature range: -40°C to 85°C
• Spread spectrum clock (SSC) compatible

• Production switches and mixers
• In vitro diagnostics
• CT and PET scanners