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RENESAS 8S89833AKILF
| Manufacturer | |
| MPN | 8S89833AKILF |
| LCSC Part # | C1520086 |
| Packaging | VFQFPN-16(3x3) |
| Customer # | |
| Key Attributes | 3V~3.6V 2GHz 4 VFQFPN-16(3x3) Clock Buffers, Drivers RoHS |
| Datasheet | RENESAS 8S89833AKILF |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | RENESAS | |
| Packaging | VFQFPN-16(3x3) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network;Output enable/shutdown | |
| Number of Inputs | - | |
| Output Frequency(Max) | 2GHz | |
| Number of outputs | 4 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | RENESAS | |
| Packaging | VFQFPN-16(3x3) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V |
| Type | Description | |
|---|---|---|
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network;Output enable/shutdown | |
| Number of Inputs | - | |
| Output Frequency(Max) | 2GHz | |
| Number of outputs | 4 |
Introduction
The 8S89833 is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer with Internal Termination. The 8S89833 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and CML to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89833 is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.
Features
- Four differential LVDS outputs
- IN, nIN input pair can accept the following differential input levels: LVPECL, LVDS, CML
- Output frequency: 2GHz
- Cycle-to-cycle jitter, RMS: 3.5ps (maximum)
- Additive phase jitter, RMS: 0.03ps (typical)
- Output skew: 30ps (maximum)
- Part-to-part skew: 200ps (maximum)
- Propagation Delay: 600ps (maximum)
- Full 3.3V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 3.8036 | $ 3.80 |
| 10+ | $ 3.2695 | $ 32.70 |
| 30+ | $ 2.9539 | $ 88.62 |
| 100+ | $ 2.6322 | $ 263.22 |
| 500+ | $ 2.4845 | $ 1242.25 |
| 1,000+ | $ 2.4183 | $ 2418.30 |
Standard Packaging100/Full Tube | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | RENESAS | |
| Packaging | VFQFPN-16(3x3) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network;Output enable/shutdown | |
| Number of Inputs | - | |
| Output Frequency(Max) | 2GHz | |
| Number of outputs | 4 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | RENESAS | |
| Packaging | VFQFPN-16(3x3) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V |
| Type | Description | |
|---|---|---|
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network;Output enable/shutdown | |
| Number of Inputs | - | |
| Output Frequency(Max) | 2GHz | |
| Number of outputs | 4 |
Introduction
The 8S89833 is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer with Internal Termination. The 8S89833 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and CML to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89833 is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.
Features
- Four differential LVDS outputs
- IN, nIN input pair can accept the following differential input levels: LVPECL, LVDS, CML
- Output frequency: 2GHz
- Cycle-to-cycle jitter, RMS: 3.5ps (maximum)
- Additive phase jitter, RMS: 0.03ps (typical)
- Output skew: 30ps (maximum)
- Part-to-part skew: 200ps (maximum)
- Propagation Delay: 600ps (maximum)
- Full 3.3V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
C1520086 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |