Lattice ISPPAC-POWR607-01SN24I

The Power Manager II ispPAC-POWR607 is a general-purpose power-supply monitor, reset generator and watchdog timer, incorporating both in-system programmable logic and analog functions implemented in nonvolatile E²CMOS technology. The ispPAC-POWR607 device provides six independent analog input channels to monitor power supply voltages. Two general-purpose digital inputs are also provided for miscellaneous control functions. The ispPAC-POWR607 provides up to seven open-drain digital outputs that can be used for controlling DC-DC converters, low-drop-out regulators (LDOs) and optocouplers, as well as for supervisory and general-purpose logic interface functions. Two of these outputs can be configured as high-voltage MOSFET drivers. In high-voltage mode these outputs provide 9V for driving the gates of n-channel MOSFETs used as high-side power switches to control power supply ramp up and ramp down rate. The remaining five digital, open drain outputs can optionally be configured as digital inputs to sense more input signals as needed, such as manual reset, etc. The ispPAC-POWR607 incorporates a 16-macrocell CPLD. Four independently programmable timers also interface with the CPLD and can create delays and time-outs ranging from 32μs to 2 seconds. The CPLD is programmed using LogiBuilder, an easy-to-learn language integrated into the PAC-Designer software. Control sequences are written to monitor the status of any of the analog input channel comparators or the digital inputs.

• Power-Down Mode ICC < 10 μA
• Simultaneously monitors up to six power supplies
• Programmable analog trip points (1% step size; 192 steps)
• Programmable glitch filter
• Power-off detection (75 mV)
• Four independent timers
• 32 μs to 2 second intervals for timing sequences
• Rugged 16-macrocell CPLD architecture
• 81 product terms / 28 inputs
• Implements state machines and combinatorial functions
• Two dedicated digital inputs
• Five programmable digital I/O pins
• Power supply ramp up/down control
• Independently configurable for FET control or digital output
• Wide Supply Range (2.64 V to 3.96 V)
• In-system programmable through JTAG
• Industrial temperature range: -40 °C to +105 °C
• 24-pin and 32-pin QFNS packages, lead-free option

• Controls power to the microprocessor system
• Generates the CPU reset
• Monitors critical power supply voltages, generating interrupts whenever faults are detected
• Provides a watchdog timer function to detect CPU operating and bus timeout errors