Alliance Memory AS4C4M32D1A-5BCN
| Manufacturer | |
| MPN | AS4C4M32D1A-5BCN |
| LCSC Part # | C1349545 |
| Packaging | FBGA-144(12x12) |
| Customer # | |
| Key Attributes | 128Mbit 200MHz DDR SDRAM FBGA-144(12x12) Memory RoHS |
| Datasheet | Alliance Memory AS4C4M32D1A-5BCN |
| Alternative Parts | 5 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Alliance Memory | |
| Packaging | FBGA-144(12x12) | |
| Operating Temperature | 0℃~+70℃ | |
| Features | Auto precharge function;Data mask function | |
| Refresh Current | 6mA | |
| Memory Size | 128Mbit | |
| Voltage - Supply | 2.3V~2.7V;- | |
| Clock Frequency | 200MHz | |
| Memory Format | DDR SDRAM |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Alliance Memory | |
| Packaging | FBGA-144(12x12) | |
| Operating Temperature | 0℃~+70℃ | |
| Features | Auto precharge function;Data mask function |
| Type | Description | |
|---|---|---|
| Refresh Current | 6mA | |
| Memory Size | 128Mbit | |
| Voltage - Supply | 2.3V~2.7V;- | |
| Clock Frequency | 200MHz | |
| Memory Format | DDR SDRAM |
Introduction
The 128Mb DDR SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 128 Mbits. It is internally configured as a quad 1M x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and CK . Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by a Read or Write command. The device provides programmable Read or Write burst lengths of 2, 4, 8. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. In addition, 128Mb DDR SDRAM features programmable DLL option. By having a programmable mode register and extended mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth; result in a device particularly well suited to high performance main memory and graphics applications.
Features
- Fast clock rate: 200 MHz
- Differential Clock CK & CK input
- 4 Bi-directional DQS. Data transactions on both edges of DQS (1DQS / Byte)
- DLL aligns DQ and DQS transitions
- Edge aligned data & DQS output
- Center aligned data & DQS input
- 4 internal banks, 1Mx32 -bit for each bank
- Programmable mode and extended mode registers - CAS Latency: 2, 2.5, 3 - Burst length: 2, 4, 8 - Burst Type: Sequential & Interleave
- All inputs except DQ’s & DM are at the positive edge of the system clock
- 4 individual DM control for write masking only
- Auto Refresh and Self Refresh
- 4096 refresh cycles / 64ms
- Operating Temperature: - Industrial -40℃~85℃ - Commercial 0℃ to 70℃
- Power supplies: VDD = 2.5V±0.2V
- Interface: SSTL_2 I/O compatible
- 144-ball 12x12x1.4mm LFBGA package -Pb and Halogen Free
Applications
- high performance main memory
- graphics applications
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 4.2014 | $ 4.20 |
| 200+ | $ 1.6269 | $ 325.38 |
| 500+ | $ 1.5698 | $ 784.90 |
| 1,000+ | $ 1.5404 | $ 1540.40 |
Standard Packaging189/Full Tray | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Alliance Memory | |
| Packaging | FBGA-144(12x12) | |
| Operating Temperature | 0℃~+70℃ | |
| Features | Auto precharge function;Data mask function | |
| Refresh Current | 6mA | |
| Memory Size | 128Mbit | |
| Voltage - Supply | 2.3V~2.7V;- | |
| Clock Frequency | 200MHz | |
| Memory Format | DDR SDRAM |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Alliance Memory | |
| Packaging | FBGA-144(12x12) | |
| Operating Temperature | 0℃~+70℃ | |
| Features | Auto precharge function;Data mask function |
| Type | Description | |
|---|---|---|
| Refresh Current | 6mA | |
| Memory Size | 128Mbit | |
| Voltage - Supply | 2.3V~2.7V;- | |
| Clock Frequency | 200MHz | |
| Memory Format | DDR SDRAM |
Introduction
The 128Mb DDR SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 128 Mbits. It is internally configured as a quad 1M x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and CK . Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by a Read or Write command. The device provides programmable Read or Write burst lengths of 2, 4, 8. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. In addition, 128Mb DDR SDRAM features programmable DLL option. By having a programmable mode register and extended mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth; result in a device particularly well suited to high performance main memory and graphics applications.
Features
- Fast clock rate: 200 MHz
- Differential Clock CK & CK input
- 4 Bi-directional DQS. Data transactions on both edges of DQS (1DQS / Byte)
- DLL aligns DQ and DQS transitions
- Edge aligned data & DQS output
- Center aligned data & DQS input
- 4 internal banks, 1Mx32 -bit for each bank
- Programmable mode and extended mode registers - CAS Latency: 2, 2.5, 3 - Burst length: 2, 4, 8 - Burst Type: Sequential & Interleave
- All inputs except DQ’s & DM are at the positive edge of the system clock
- 4 individual DM control for write masking only
- Auto Refresh and Self Refresh
- 4096 refresh cycles / 64ms
- Operating Temperature: - Industrial -40℃~85℃ - Commercial 0℃ to 70℃
- Power supplies: VDD = 2.5V±0.2V
- Interface: SSTL_2 I/O compatible
- 144-ball 12x12x1.4mm LFBGA package -Pb and Halogen Free
Applications
- high performance main memory
- graphics applications
C1349545 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Alternative Parts
| MPN | Manufacturer | Alternative Type | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|---|
| AS4C4M32D1A-5BCNTR | Alliance Memory | Similar | LFBGA-144(12x12) | 0 | $ 9.169 | ||
| AS4C4M32D1A-5BIN | Alliance Memory | Similar | FBGA-144(12x12) | 0 | $ 4.2693 | ||
| AS4C4M32D1A-5BINTR | Alliance Memory | Similar | LFBGA-144(12x12) | 0 | $ 10.3156 | ||
| IS43R32400E-5BL-TR | ISSI | Similar | BGA-144(12x12) | 0 | $ 5.0119 | ||
| IS43R32400E-5BLI | ISSI | Similar | BGA-144(12x12) | 0 | $ 6.0026 |

