Lattice LC4064V-75TN48C

The high performance ispMACH 4000 family offers a SuperFAST CPLD solution. It blends Lattice’s two most popular architectures: the ispLSI 2000 and ispMACH 4A. The ispMACH 4000 architecture combines high performance with low power in a flexible CPLD family. It combines high speed and low power with flexibility for ease of design. With its Global Routing Pool and Output Routing Pool, it delivers excellent First-Time-Fit, timing predictability, routing, pin-out retention and density migration. The family offers densities from 32 to 512 macrocells. There are multiple density-I/O combinations in TQFP, csBGA and ftBGA packages from 44 to 256 pins/balls. It has enhanced system integration capabilities. It supports 3.3V (4000V), 2.5V (4000B) and 1.8V (4000C/Z) supply voltages and 3.3V, 2.5V and 1.8V interface voltages. It is 5V tolerant. It also offers enhanced I/O features such as slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing. The family members are 3.3V/ 2.5V/1.8V in-system programmable through the IEEE Standard 1532 interface. IEEE Standard 1149.1 boundary scan testing capability allows product testing on automated test equipment. The 1532 interface signals TCK, TMS, TDI and TDO are referenced to VCC (logic core).

• ΔfMAX = 400MHz maximum operating frequency
• fPD = 2.5 ns propagation delay
• Up to four global clock pins with programmable clock polarity control
• Up to 80 PTs per output
• Enhanced macrocells with individual clock, reset, preset and clock enable controls
• Up to four global OE controls
• Individual local OE control per I/O pin
• Excellent First-Time-FitTM and refit
• Fast path, SpeedLockingTM Path, and wide-PT path
• Wide input gating (36 input logic blocks) for fast counters, state machines and address decoders
• Typical static current 10μA (4032Z)
• Typical static current 1.3mA (4000C)
• 1.8V core low dynamic power
• ispMACH 4000Z operational down to 1.6V VCC
• Multiple temperature range support – Commercial: 0 to 90℃ junction (Tj) – Industrial: -40 to 105℃ junction (Ti) – Extended: -40 to 130℃ junction (Tj)
• Superior solution for power sensitive consumer applications
• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
• Operation with 3.3V (4000V), 2.5V (4000B) or 1.8V (4000C/Z) supplies
• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces
• Hot-socketing
• Open-drain capability
• Input pull-up, pull-down or bus-keeper
• Programmable output slew rate
• 3.3V PCI compatible
• IEEE 1149.1 boundary scan testable
• 3.3V/2.5V/1.8V In-System Programmable (ISP) using IEEE 1532 compliant interface
• I/O pins with fast setup path
• Lead-free package options