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onsemi NB7VQ572MMNR4G

Manufacturer
MPN
NB7VQ572MMNR4G
LCSC Part #
C603402
Packaging
QFN-32-EP(5x5)
Customer #
Key Attributes
Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
Datasheetonsemi NB7VQ572MMNR4G
RoHS Compliance3 documents available
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QtyUnit Price(Reference Only)Total Amount
1+$ 21.4785$ 21.48
30+$ 20.4689$ 614.07
Standard Packaging1000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers
Manufactureronsemi
PackagingQFN-32-EP(5x5)
Operating Temperature-40℃~+85℃
Voltage - Supply1.71V~3.6V
FeaturesMulti-channel fan-out/isolation drive;Internal termination and bias network
Number of Inputs4
Output Frequency(Max)7GHz
Number of outputs2

Introduction

AI Translation

The NB7VQ572M is a high performance differential 4:1 Clock / Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that operates up to 7 GHz / 10 Gbps respectively with a 1.8 V, 2.5 V, or 3.3 V power supply. Each INx / INx input pair incorporates a fixed Equalizer Receiver, which when placed in series with a Data path, will enhance the degraded signal transmitted across an FR4 backplane or cable interconnect. For applications that do not require Equalization, consider the NB7V572M, which is pin−compatible to the NB7VQ572M. The differential Clock / Data inputs have internal 50 Ω termination resistors and will accept differential LVPECL, CML, or LVDS logic levels. The NB7VQ572M incorporates a pair of Select pins that will choose one of four differential inputs and will produce two identical CML output copies of Clock or Data. As such, the NB7VQ572M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The two differential CML outputs will swing 400 mV when externally loaded and terminated with a 50 Ω resistor to VCC and are optimized for low skew and minimal jitter. The NB7VQ572M is offered in a low profile 5x5 mm 32−pin QFN Pb−Free package.

Features

AI Translation
  • Input Data Rate >10 Gb/s Typical
  • Data Dependent Jitter <10 ps
  • Maximum Input Clock Frequency >6 GHz Typical
  • Random Clock Jitter <0.8 ps RMS
  • Low Skew 1:2 CML Outputs, <15 ps max
  • 4:1 Multi−Level Mux Inputs, accepts LVPECL, CML, LVDS
  • 175 ps Typical Propagation Delay
  • 45 ps Typical Rise and Fall Times
  • Differential CML Outputs, 400 mV Peak−to−Peak, Typical
  • Operating Range: VCC = 1.71 V to 3.6 V with GND = 0 V
  • Internal 50 Ω Input Termination Resistors
  • VREFAC Reference Output
  • QFN−32 Package, 5mm x 5mm , Pb−Free
  • -40℃ to +85℃ Ambient Operating Temperature
  • These are Pb−Free Devices

Applications

AI Translation
  • SONET
  • GigE
  • Fiber Channel
  • Backplane
  • other Clock/Data distribution applications