Nexperia 74LVC1G02GW-Q100125
| Manufacturer | |
| MPN | 74LVC1G02GW-Q100125 |
| LCSC Part # | C4469892 |
| Packaging | TSSOP-5 |
| Customer # | |
| Key Attributes | 1.65V~5.5V 5.5ns@5.5V,50pF 4uA TSSOP-5 Gates and Inverters |
| Datasheet | Nexperia 74LVC1G02GW-Q100125 |
| Alternative Parts | 10 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-5 | |
| output type | - | |
| Input Type | Schmitt trigger;TTL compatible CMOS | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Logic Level - Low | 100mV;700mV;450mV;600mV;800mV | |
| Propagation Delay | 5.5ns@5.5V,50pF | |
| Input Logic Level - Low | 700mV;800mV | |
| Input Logic Level - High | 1.7V;2V | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Operating Temperature | -40℃~+125℃ | |
| Output Logic Level - High | 950mV;1.7V;1.9V;2V;3.4V | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 1;2 | |
| Current - Output Low(IOL) | 24mA |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-5 | |
| output type | - | |
| Input Type | Schmitt trigger;TTL compatible CMOS | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Logic Level - Low | 100mV;700mV;450mV;600mV;800mV | |
| Propagation Delay | 5.5ns@5.5V,50pF |
| Type | Description | |
|---|---|---|
| Input Logic Level - Low | 700mV;800mV | |
| Input Logic Level - High | 1.7V;2V | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Operating Temperature | -40℃~+125℃ | |
| Output Logic Level - High | 950mV;1.7V;1.9V;2V;3.4V | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 1;2 | |
| Current - Output Low(IOL) | 24mA |
Introduction
The 74LVC1G02-Q100 is a single 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- CMOS low power dissipation
- IOFF circuitry provides partial Power-down mode operation
- ±24 mA output drive (VCC = 3.0 V)
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 0.0543 | $ 0.05 |
| 200+ | $ 0.021 | $ 4.20 |
| 500+ | $ 0.0203 | $ 10.15 |
| 1,000+ | $ 0.0199 | $ 19.90 |
Standard Packaging1/Full Bag | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-5 | |
| output type | - | |
| Input Type | Schmitt trigger;TTL compatible CMOS | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Logic Level - Low | 100mV;700mV;450mV;600mV;800mV | |
| Propagation Delay | 5.5ns@5.5V,50pF | |
| Input Logic Level - Low | 700mV;800mV | |
| Input Logic Level - High | 1.7V;2V | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Operating Temperature | -40℃~+125℃ | |
| Output Logic Level - High | 950mV;1.7V;1.9V;2V;3.4V | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 1;2 | |
| Current - Output Low(IOL) | 24mA |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-5 | |
| output type | - | |
| Input Type | Schmitt trigger;TTL compatible CMOS | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Logic Level - Low | 100mV;700mV;450mV;600mV;800mV | |
| Propagation Delay | 5.5ns@5.5V,50pF |
| Type | Description | |
|---|---|---|
| Input Logic Level - Low | 700mV;800mV | |
| Input Logic Level - High | 1.7V;2V | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Operating Temperature | -40℃~+125℃ | |
| Output Logic Level - High | 950mV;1.7V;1.9V;2V;3.4V | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 1;2 | |
| Current - Output Low(IOL) | 24mA |
Introduction
The 74LVC1G02-Q100 is a single 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- CMOS low power dissipation
- IOFF circuitry provides partial Power-down mode operation
- ±24 mA output drive (VCC = 3.0 V)
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
C4469892 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| 74LVC1G02GW-Q100H | Nexperia | TSSOP-5-1.3mm | 570 | $ 0.1165 | ||
| 74LVC1G02GW,125 | Nexperia | SOT-353-5 | 9,590 | $ 0.0727 | ||
| CJ74LVC1G02R5N | JSCJ | SOT-353 | 3,010 | $ 0.0702 | ||
| EM74LVC1G02GW | EnergyMath | SOT-353 | 3,000 | $ 0.0549 | ||
| RS1G02XC5 | RUNIC | SC70-5 | 345 | $ 0.1147 | ||
| SN74LVC1G02DCKR(UMW) | UMW | SC-70-5 | 880 | $ 0.0449 | ||
| MSN74LVC1G02DCKR | MSKSEMI | SC-70-5 | 2,050 | $0.0516 $0.0543 | ||
| 74LVC1G02GW/C1125 | Nexperia | TSSOP-5 | 0 | $ 0.0326 | ||
| 74LVC1G02DCKRG | HANSCHIP semiconductor | SC-70-5 | 0 | $ 0.0423 | ||
| GT74LVC1G02C5 | GTIC | SC-70-5 | 0 | $ 0.0897 |