FM XMC2711S14
| Manufacturer | FMAsian Brands |
| MPN | XMC2711S14 |
| LCSC Part # | C2764440 |
| Packaging | SOP-14 |
| Customer # | |
| Key Attributes | Other SOP-14 Microcontrollers |
| Datasheet | FM XMC2711S14 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | FM | |
| Packaging | SOP-14 | |
| ADC (Bit) | 12bit | |
| Number of I/O | 12 | |
| Voltage - Supply | 2.4V~5.5V | |
| Program Memory Type | OTP | |
| Program Storage Size | 1KB | |
| CPU Core | Other |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | FM | |
| Packaging | SOP-14 | |
| ADC (Bit) | 12bit | |
| Number of I/O | 12 |
| Type | Description | |
|---|---|---|
| Voltage - Supply | 2.4V~5.5V | |
| Program Memory Type | OTP | |
| Program Storage Size | 1KB | |
| CPU Core | Other |
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Features
AI Translation
- Memory configuration OTP ROM: 1κ×16-bit, RAM: 64 bytes
- 4-level stack buffer
- Bidirectional I/O ports: P0, P4, P5
- Unidirectional input pin: P0.4, shared with reset pin
- Wake-up capable port: P0 level-triggered
- Built-in pull-up resistor ports: P0, P4, P5
- ADC input hardware: P4.0~P4.4
- External interrupt pins: P0.0 controlled by register PEDGE; P0.1 falling-edge triggered
- 3-level VLD system reset, monitors system supply voltage
- 5 interrupt sources: 3 internal interrupts (TC0, TC1, ADC); 2 external interrupts (INT0, INT1)
- Powerful instruction set, one-word instruction length; most instructions execute in a single clock cycle; JMP supports full ROM range; CALL supports full ROM range; MOVC addresses full ROM range
- s+1 channel 12-bit ADC: 5 external ADC inputs, 1 internal battery detection, internal AD reference voltage (VDD, 4V, 3V, 2V)
- Two 8-bit timer/counters — TC0: external event counter/PWM0/Buzzer output; TC1: external event counter/PWM1/Buzzer output
- Built-in watchdog timer clocked by internal low-speed RC oscillator (16KHz@3V, 32KHz@5V)
- 4 system clocks — external high-speed clock: RC mode, up to 10MHz; external high-speed clock: crystal mode, up to 16MHz; internal high-speed clock: RC mode, up to 16MHz; internal low-speed clock: RC mode, 16KHz (3V), 32KHz (5V)
- Operating modes: normal mode (high- and low-speed clocks active simultaneously); low-speed mode (low-speed clock only); sleep mode (both clocks stopped); green mode (periodically woken up by TC0)
- Package options: PDIP-14 pins, SOP-14 pins, SOP-8 pins, SOT23 6pins
- Fcpu (instruction cycle): Fcpu = Fosc/2, Fosc/4, Fosc/8, Fosc/16
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | FM | |
| Packaging | SOP-14 | |
| ADC (Bit) | 12bit | |
| Number of I/O | 12 | |
| Voltage - Supply | 2.4V~5.5V | |
| Program Memory Type | OTP | |
| Program Storage Size | 1KB | |
| CPU Core | Other |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | FM | |
| Packaging | SOP-14 | |
| ADC (Bit) | 12bit | |
| Number of I/O | 12 |
| Type | Description | |
|---|---|---|
| Voltage - Supply | 2.4V~5.5V | |
| Program Memory Type | OTP | |
| Program Storage Size | 1KB | |
| CPU Core | Other |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- Memory configuration OTP ROM: 1κ×16-bit, RAM: 64 bytes
- 4-level stack buffer
- Bidirectional I/O ports: P0, P4, P5
- Unidirectional input pin: P0.4, shared with reset pin
- Wake-up capable port: P0 level-triggered
- Built-in pull-up resistor ports: P0, P4, P5
- ADC input hardware: P4.0~P4.4
- External interrupt pins: P0.0 controlled by register PEDGE; P0.1 falling-edge triggered
- 3-level VLD system reset, monitors system supply voltage
- 5 interrupt sources: 3 internal interrupts (TC0, TC1, ADC); 2 external interrupts (INT0, INT1)
- Powerful instruction set, one-word instruction length; most instructions execute in a single clock cycle; JMP supports full ROM range; CALL supports full ROM range; MOVC addresses full ROM range
- s+1 channel 12-bit ADC: 5 external ADC inputs, 1 internal battery detection, internal AD reference voltage (VDD, 4V, 3V, 2V)
- Two 8-bit timer/counters — TC0: external event counter/PWM0/Buzzer output; TC1: external event counter/PWM1/Buzzer output
- Built-in watchdog timer clocked by internal low-speed RC oscillator (16KHz@3V, 32KHz@5V)
- 4 system clocks — external high-speed clock: RC mode, up to 10MHz; external high-speed clock: crystal mode, up to 16MHz; internal high-speed clock: RC mode, up to 16MHz; internal low-speed clock: RC mode, 16KHz (3V), 32KHz (5V)
- Operating modes: normal mode (high- and low-speed clocks active simultaneously); low-speed mode (low-speed clock only); sleep mode (both clocks stopped); green mode (periodically woken up by TC0)
- Package options: PDIP-14 pins, SOP-14 pins, SOP-8 pins, SOT23 6pins
- Fcpu (instruction cycle): Fcpu = Fosc/2, Fosc/4, Fosc/8, Fosc/16
C2764440 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| ECCN | |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |



