Nexperia 74LVC138APW-Q100J

The 74LVC138A-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LVC138A-Q100 to a 1-of-32 (5 to 32 lines) decoder with just four 74LVC138A-Q100 ICs and one inverter. The 74LVC138A-Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Overvoltage tolerant inputs to 5.5 V
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Mutually exclusive outputs
• Output drive capability 50 Ω transmission lines at 125 °C
• ESD protection:
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Multiple package options
• DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

• Memory chip select decoding
• Multiplexer
• Automotive applications