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Infineon/CYPRESS CY62147DV30L-70ZSXI

Manufacturer
MPN
CY62147DV30L-70ZSXI
LCSC Part #
C2956593
Packaging
TSOP-44
Customer #
Key Attributes
4Mbit Parallel Port (Parallel) TSOP-44 Memory RoHS
DatasheetInfineon/CYPRESS CY62147DV30L-70ZSXI
RoHS Compliance1 documents available
Alternative Parts5
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
ManufacturerInfineon/CYPRESS
PackagingTSOP-44
Operating Temperature-40℃~+85℃
FeaturesAuto power-down function
Memory Size4Mbit
Voltage - Supply2.2V~3.6V;15mA
Access Time70ns
Standby Supply Current2uA
InterfaceParallel Port (Parallel)

Introduction

AI Translation

The CY62147DV30 is a high-performance CMOS static random access memory organized as 256K words × 16 bits. The device utilizes advanced circuit design to deliver ultra-low operating current, making it ideal for extending battery life in portable applications such as mobile phones. The device also features automatic power-down, which significantly reduces power consumption. When deselected (CE high, or both BLE and BHE high), the device enters standby mode, reducing power consumption by more than 99%. When deselected (CE high), output disabled (OE high), both byte high enable and byte low enable disabled (BHE and BLE high), or during a write operation (CE low and WE low), the I/O pins (I/O₀ through I/O₁₅) are in a high-impedance state. To write data to the device, drive the chip enable (CE) and write enable (WE) inputs low. If byte low enable (BLE) is low, data on the I/O pins (I/O₀ through I/O₇) is written to the location specified by the address pins (A₀ through A₁₇). If byte high enable (BHE) is low, data on the I/O pins (I/O₈ through I/O₁₅) is written to the location specified by the address pins (A₀ through A₁₇). To read data from the device, drive chip enable (CE) and output enable (OE) low while driving write enable (WE) high. If byte low enable (BLE) is low, data from the memory location specified by the address pins appears on I/O₀ through I/O₇. If byte high enable (BHE) is low, the stored data appears on I/O₈ through I/O₁₅. For a complete description of the read and write modes, refer to the truth table later in this datasheet. The CY62147DV30 is available in a 48-ball VFBGA package and a 44-pin TSOP II package.

Features

AI Translation
  • Temperature range: Industrial grade: -40°C to +85°C; Automotive grade: -40°C to +125°C
  • Very high speed: 45 ns
  • Wide voltage range: 2.20V to 3.60V
  • Pin-compatible with CY62147CV25, CY62147CV30, and CY62147CV33
  • Ultra-low active power: typical active current 1.5 mA @ f = 1 MHz, typical active current 8 mA @ f = fmax
  • Ultra-low standby power
  • Easy memory expansion with CE and OE; automatic power-down on deselection
  • CMOS speed/power ratio
  • Packages: 48-ball BGA and 44-pin TSOPII; lead-free packages available
  • Byte power-down feature

Applications

AI Translation
  • Mobile phones
  • Portable applications