Infineon CY8C4147AZS-S295T

PSoC 4 is a scalable and reconfigurable platform architecture for a range of programmable embedded system controllers based on the Arm Cortex-M0+ CPU and compliant with AEC-Q100. It combines programmable and reconfigurable analog and digital blocks with flexible auto-routing capabilities. The PSoC 4100S Plus is a member of the PSoC 4 platform architecture. It integrates a microcontroller with standard communication and timing peripherals, a best-in-class capacitive touch sensing system, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4100S Plus devices are forward-compatible with other members of the PSoC 4 platform to address new application and design requirements.

• AEC-Q100 qualified
• 32-bit MCU subsystem with 48-MHz Arm Cortex-M0+ CPU, up to 128 KB flash (with read accelerator), up to 16 KB SRAM, and 8-channel DMA engine
• Programmable analog subsystem with two opamps reconfigurable as high-drive external and high-bandwidth internal drive and comparator modes with ADC input buffering; opamps operational in Deep Sleep low-power mode; 12-bit 1-Msps SAR ADC with differential and single-ended modes and channel sequencer with signal averaging; capacitive sensing block providing single-slope 10-bit ADC functionality; two IDACs for general-purpose or capacitive sensing on any pin; two low-power comparators operational in Deep Sleep low-power mode
• Programmable digital subsystem with programmable logic blocks allowing Boolean operations on port inputs and outputs
• Low-power operating voltage range 1.71 V to 5.5 V, with analog subsystem active in Deep Sleep mode and digital system current as low as 2.5 μA
• Capacitive sensing using capacitive Σ-Δ technology for best-in-class SNR and liquid tolerance; software components simplify capacitive sensing design; automatic hardware tuning support
• LCD drive capability with GPIO supporting LCD segment drive
• Serial communications with five independent runtime-reconfigurable serial communication blocks supporting reconfigurable I2C, SPI, UART, or LIN slave functionality
• Timing and PWM with eight 16-bit timer/counter/PWM modules; center-aligned, edge, and pseudo-random modes; comparator-based triggering for motor drive and other high-reliability digital logic applications; quadrature decoder included
• Clock sources including 4 to 33 MHz external crystal oscillator, PLL for 48-MHz generation, 32-kHz watchdog crystal oscillator, ±2% accuracy internal main oscillator, and 32-kHz internal low-power oscillator
• True random number generator for cryptographic applications producing true random numbers for security keys
• CAN 2.0B protocol support with time-triggered CAN support
• Operating temperature range: Grade A -40°C to +85°C, Grade S -40°C to +105°C, Grade E -40°C to +125°C
• Up to 54 programmable GPIO pins in 40-pin QFN, 64-pin QFN, and 64-pin TQFP packages; any GPIO pin configurable as capacitive sensing, analog, or digital; drive mode, strength, and slew rate programmable
• Integrated development environment with schematic design entry and build (with analog and digital autorouting); API components for all fixed-function and programmable peripherals
• Compatible with Arm-based industry-standard development tools