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MICROCHIP KSZ9893RNXI-TR

Fabricante
MICROCHIP
N.º de pieza fab.
KSZ9893RNXI-TR
Nº LCSC
C631690
Emb.
VQFN-64-EP(8x8)
Número de Cliente
Atrib. clave
1gbps VQFN-64-EP(8x8) Controllers RoHS
Hoja de DatosMICROCHIP KSZ9893RNXI-TR
Cumplimiento RoHS2 documentos disponibles
En stock: 3
3 En stock, envío inmediato
Mínimo: 1Múltiplo: 1Unidad de venta: Piece
Añadir a la Lista BOM
Cant.Prec. unit.Importo total
1+$ 12.159$ 12.16
10+$ 10.4566$ 104.57
30+$ 9.42$ 282.60
100+$ 8.5494$ 854.94
Encapsulado Estándar1000/Full Reel
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Especificaciones del Producto

Todo
TipoDescripción
CategoríaIntegrated Circuits (ICs)/Interface/Controllers
FabricanteMICROCHIP
Emb.VQFN-64-EP(8x8)
Voltage - Supply1.8V~3.3V
FeaturesWake-up function
Operating Temperature-40℃~+85℃
InterfaceRGMII;MII;RMII
Data Rate1gbps
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Características

Traducción por IA
  • Non-blocking wire-speed Ethernet switching fabric
  • Full-featured forwarding and filtering control, including Access Control List (ACL) filtering
  • Full VLAN and QoS support
  • Two ports with integrated 10/100/1000BASE-T PHYs
  • One port with 10/100/1000 Ethernet MAC and configurable RGMII/MII/RMII interface
  • IEEE 802.1X port-based authentication support
  • EtherGreen™ power management features, including low power standby and IEEE 802.3az
  • Flexible management interface options: SPI, I²C, MIIM, and in-band management via any port
  • Commercial/Industrial temperature range support
  • 64-pin VQFN (8×8mm) lead-free package
  • Switch Management Capabilities:
    • 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters
    • Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 128kByte frame buffer
    • Jumbo packet support up to 9000 bytes
    • Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port
    • MIB counters for fully-compliant statistics gathering 34 counters per port
    • Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority
    • Loopback modes for remote failure diagnostics
    • Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery
    • Multiple spanning tree protocol (MSTP) support
  • Two Integrated PHY Ports:
    • 1000BASE-T/100BASE-TX/10BASE-T IEEE 802.3
    • Fast Link-up option significantly reduces link-up time
    • Auto-negotiation and Auto-MDI/MDI-X support
    • Energy-Efficient Ethernet (EEE) support with lowpower idle mode and clock stoppage
    • On-chip termination resistors and internal biasing for differential pairs to reduce power
    • LinkMD cable diagnostic capabilities for determining cable opens, shorts, and length
  • One Configurable External MAC Port:
    • Reduced Gigabit Media Independent Interface (RGMII) v2.0
    • Reduced Media Independent Interface (RMII) v1.2 with 50MHz reference clock input/output option
    • Media Independent Interface (MII) in PHY/MAC mode
  • Advanced Switch Capabilities:
    • IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs
    • IEEE 802.1p/Q tag insertion/removal on per port basis
    • VLAN ID tag/untag options on per port or VLAN basis
    • IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control
    • IEEE 802.1X (Port-Based Network Access Control)
    • IGMP v1/v2/v3 snooping for multicast packet filtering
    • IPv6 multicast listener discovery (MLD) snooping
    • IPv4/IPv6 QoS support, QoS/CoS packet prioritization
    • 802.1p QoS packet classification with 4 priority queues
    • Programmable rate limiting at ingress/egress ports
    • Broadcast storm protection
    • Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class
    • MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
    • Self-address filtering for implementing ring topologies
  • Comprehensive Configuration Registers Access:
    • High-speed 4-wire SPI (up to 50MHz), I²C interfaces provide access to all internal registers
    • MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers
    • In-band management via any of the three ports
    • I/O pin strapping facility to set certain register bits from I/O pins at reset time
    • On-the-fly configurable control registers
  • Power Management:
    • IEEE 802.3az Energy Efficient Ethernet (EEE)
    • Energy detect power-down mode on cable disconnect Dynamic clock tree control
    • Unused ports can be individually powered down
    • Full-chip software power-down
    • Wake-on-LAN (WoL) standby power mode

Aplicaciones

Traducción por IA
  • Stand-alone 10/100/1000Mbps Ethernet switches
  • VoIP infrastructure switches
  • Broadband gateways/firewalls
  • Wi-Fi access points
  • Integrated DSL/cable modems
  • Security/surveillance systems
  • Industrial control/automation switches
  • Networked measurement and control systems