TI SNJ54ACT573W
| 제조업체 | |
| 제조사 품번 | SNJ54ACT573W |
| LCSC 번호 | C3755338 |
| 포장 | CFP-20 |
| 고객 번호 | |
| 주요 제원 | TTL-compatible CMOS 4.5V~5.5V 8 13.5ns@5V CFP-20 Buffers, Drivers, Receivers, Transceivers |
| 데이터시트 | TI SNJ54ACT573W |
제품 사양
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | CFP-20 | |
| Input type | TTL-compatible CMOS | |
| Current - Output High(IOH) | 24mA | |
| Series | ACT | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 8 | |
| Features | Output enable | |
| Operating Temperature | -55℃~+125℃ | |
| Quiescent Supply Current | 80uA | |
| Propagation Delay | 13.5ns@5V |
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | CFP-20 | |
| Input type | TTL-compatible CMOS | |
| Current - Output High(IOH) | 24mA | |
| Series | ACT | |
| Voltage - Supply | 4.5V~5.5V |
| 타입 | 설명 | |
|---|---|---|
| Output Type | Tri-State | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 8 | |
| Features | Output enable | |
| Operating Temperature | -55℃~+125℃ | |
| Quiescent Supply Current | 80uA | |
| Propagation Delay | 13.5ns@5V |
개요
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches are D-type transparent latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines in a bus-organized system without need for interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
주요 특징
- 4.5-V to 5.5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 9.5 ns at 5 V
- Inputs Are TTL-Voltage Compatible
응용 분야
- buffer registers
- I/O ports
- bidirectional bus drivers
- working registers
| 수량 | 단가(참고용) | 총액 |
|---|---|---|
| 1+ | $ 49.2603 | $ 49.26 |
| 200+ | $ 19.0636 | $ 3812.72 |
| 500+ | $ 18.393 | $ 9196.50 |
| 1,000+ | $ 18.0632 | $ 18063.20 |
표준 패키지1/Full Bag | ||
제품 사양
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | CFP-20 | |
| Input type | TTL-compatible CMOS | |
| Current - Output High(IOH) | 24mA | |
| Series | ACT | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 8 | |
| Features | Output enable | |
| Operating Temperature | -55℃~+125℃ | |
| Quiescent Supply Current | 80uA | |
| Propagation Delay | 13.5ns@5V |
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | CFP-20 | |
| Input type | TTL-compatible CMOS | |
| Current - Output High(IOH) | 24mA | |
| Series | ACT | |
| Voltage - Supply | 4.5V~5.5V |
| 타입 | 설명 | |
|---|---|---|
| Output Type | Tri-State | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 8 | |
| Features | Output enable | |
| Operating Temperature | -55℃~+125℃ | |
| Quiescent Supply Current | 80uA | |
| Propagation Delay | 13.5ns@5V |
개요
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches are D-type transparent latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines in a bus-organized system without need for interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
주요 특징
- 4.5-V to 5.5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 9.5 ns at 5 V
- Inputs Are TTL-Voltage Compatible
응용 분야
- buffer registers
- I/O ports
- bidirectional bus drivers
- working registers
C3755338 EasyEDA 라이브러리
컴플라이언스 & 수출 코드
| 타입 | 세부사항 |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| 타입 | 세부사항 |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| 타입 | 세부사항 |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

